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Posts Tagged ‘Imagination’

Behold the Intrinsic Value of IP

Monday, March 13th, 2017

By Grant Pierce, CEO

Sonics, Inc.

Editor’s Note [this article was written in response to questions about IP licensing practices.  A follow-up article will be published in the next 24 hours with the title :” Determining a Fair Royalty Value for IP”].

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Understanding the intrinsic value of Intellectual Property is like beauty, it is in the eye of the beholder.  The beholder of IP Value is ultimately the user/consumer of that IP – the buyers. Buyers tend to value IP based upon their ability to utilize that IP to create competitive advantage, and therefore higher value for their end product. The IP Value figure above was created to capture this concept.

To be clear, this view is NOT about relative bargaining power between buyer and the supplier of IP – the seller –  that is built on the basis of patents. Mounds of court cases and text books exist that explore the question of patent strength. What I am positing is that viewing IP value as a matter of a buyer’s perception is a useful way to think of the intrinsic value of IP.

Position A on the value chart is a classification of IP that allows little differentiation by the buyer, but is addressing a more elastic market opportunity. This would likely be a Standard IP type that would implement an open standard. IP in this category would likely have multiple sources and therefore competitive pricing.  Although compliance with the standard would be valued by the buyer, the price of the IP itself would be likely lower reflecting its commodity nature. Here, the value might be equated to the cost of internally creating equivalent IP. Since few, if any, buyers in this category would see advantage for making this IP themselves and because there are likely many sellers, the intrinsic value of this IP is determined on a “buy vs buy” basis.  Buyers are going to buy this IP regardless, so they’ll look for the seller with the proposition most favorable to the buyer – which often is just about price.

Position B on the value chart is a classification of IP that allows for differentiation by the buyer, but addresses a more elastic market. IP in this category might be less constrained by standards requirements. It is likely that buyers would implement unique instantiations of this IP type and as a result command some end competitive advantage. Buyers in this category could make this IP themselves, but because there are commercial alternatives, the intrinsic value is determined by applying a “make vs buy” analysis. The value proposition of the sellers of this type of IP often include some important, but soft value propositions (e.g., ease of re-use, time-to-market, esoteric features), the make vs buy determination is highly variable and often buyer-specific. This in part explains the variability of pricing for this type of IP.

Position C on the value chart is a classification of IP that serves a less elastic market and empowers buyers to differentiate through their unique implementations of that IP. This classification of IP supports license fees and larger, more consistent, royalty rates. IP in this category becomes the competitive differentiation that sways large market share to the winning products incorporating that IP. This category supports some of the larger IP companies in the marketplace today. Buyers in this category are not going to make the IP themselves because the cost of development of the product and its ecosystem is too prohibitive and risky. The intrinsic value really comes down to what the seller charges.

This is a “buy vs not make” decision – meaning one either buys the IP or it doesn’t bother to make the product. A unique hallmark of IP in this position is that so long as the seller applies pricing consistently, then all buyers know at the very least that they are not disadvantaged relative to the competition and will continue to buy. Sellers will often give some technology away to encourage long-term lock in. For these reasons, pricing of IP in this space tends to be quite stable. That pricing level must subjectively be below the level that customers begin to perform unnatural acts and explore unusual alternatives.  So long as it does, the price charged probably represents accurately the intrinsic value.

Position D on the value chart is a classification of IP that requires adherence to a standard. Like category A, adherence to the standard does not necessarily allow differentiation to the buyer. The buyer of this category of IP might be required to use this IP in order to gain access to the market itself. Though the lack of end-product differentiation available to the buyer might suggest a lower license fee and/or lower to zero royalty rate, we see a significantly less elastic market for this IP type.

This IP category tends to comprise products adhering to closed and/or proprietary standards. IP products built on such closed and/or proprietary standards have given rise to several significant IP business franchises in the marketplace today. The IP in position D is in part characterized by the need to spend significant time and money to develop, market and maintain (defend) their position, in addition to spending on IP development. For this reason, teasing out the intrinsic value of this IP is not as straightforward as “make vs buy.” Pricing is really viewed more as a tax. So the intrinsic value determination is based on a “Fair Tax” basis. If buyers think the tax is no longer “fair,” for any reason, they will make the move to a different technology.

Examples:

Position A:  USB, PCI, memory interfaces (Synopsys)

Position B:  Configurable Processors, Analog IP cores (Synopsys, Cadence)

Position C:  General Purpose Processors, Graphics, DSP, NoC, EPU (ARM, Imagination, CEVA, Sonics)

Position D: CDMA, Noise Reduction, DDR (Qualcomm, Dolby, Rambus)

Why Customer Success is Paramount

Sonics is an IP supplier whose products tend to reside in the Type C category. Sonics sets its semiconductor IP pricing as a function of the value of the SoC design/chip that uses the IP. There is a spectrum of value functions for the Sonics IP depending upon the type of chip, complexity of design, target power/performance, expected volume, and other factors. Defining the upper and lower bounds of the value spectrum depends upon an approximation of these factors for each particular chip design and customer.

Royalties are one component of the price of IP and are a way of risk sharing to allow customers to bring their products to market without having to pay the full value of the incorporated IP up front. The benefit being that the creator and supplier of the IP is essentially investing in the overall success of the user’s product by accepting the deferred royalty payment. Sonics views the royalty component of its IP pricing as “customer success fees.”

With its recently introduced EPU technology, Sonics has adopted an IP business model based upon an annual technology access fee and a per power grain usage fee due at chip tapeout. Under this model, customers have unlimited use of the technology to explore power control for as many designs as they want, but only pay for their actual IP usage in a completed design. The tape out fee is calculated based on the number of power grains used in the design on a sliding scale. The more power grains customers use, the more energy saved, and the lower the cost per grain. Using more power grains drives lower energy consumption by the chip – buyers increase the market value of their chips using Sonics’ EPU technology. The bottom line is that Sonics’ IP business model depends on customers successfully completing their designs using Sonics IP.

Blog Review – Monday, January 12, 2015

Monday, January 12th, 2015

New year resolutions from ARM, IP Extreme; CES highlights from Cadence, Synopsys, ARM partners; Mentor looks back at 2014; Imagination looks ahead

It wouldn’t be a January Blog Review without a mention of resolutions. Jacob Beningo, ARM, is disappointed that DeLoreans and hover boards are not filling the skies as predicted in Back to the Future, but he does believe that 2015 should be the year of sound, embedded software development resolutions.

A challenge is thrown down by McKenzie, IP Extreme, to ensure the company meets its new year resolution to update its blog. If you find that the company has missed posting a blog by midnight Wednesday (Pacific time) you can claim a $100 voucher for a chop or restaurant of your choice.

It wouldn’t be the week after CES, if there were no mentions of ‘that show’. Michael Posner, Synopsys, looked beneath the cars, entertainment devices and robots to focus on sensors (and to mention DesignWare Sensor and Control Subsystem, which designs them).

Brian Fuller, Cadence, interviews Martin Lund, senior vice president for Cadence’s IP Group, at CES. Lund has some interesting observations about audio and video demos at the show and insight into the role of IP.

ARM was everywhere at CES, and Brad Nemire, ARM, has some great videos on his blog, with demos of partners’ devices, and also a link to a Bloomberg interview with CEO Simon Segars.

International finance was not covered at CES, but the mobile money payment services described in the blog by Catherine Bolgar, Dassault Systemes has a lot of ‘CES criteria’, connectivity, innovation and commercial applications, as well as the Vegas connection with cash. It is an enlightening view of how technology can help those without deemed to expensive to reach and service by conventional banking institutions.

Looking back at 2014, Vern Wnek, Mentor, considers the overall winner of the longest running EDA awards, the Technology Leadership Awards, Alcatel-Lucent. The award winnning project was the 1X100GE packet module includes 100Gb/s of total processing power and signals operating at 6/12/28GHz.

A world without wired cables, is the vision of Alexandru Voica, Imagination, who checks just how close a cable-free life is; encouraged with some introductions from the company, of course.

By Caroline Hayes, Senior Editor.

Blog review – Monday, Nov. 03 2014

Monday, November 3rd, 2014

Intel cooks up a vision of the IoT; Cadence turns up the verification volume; Synopsys celebrates being ‘-free’; ARM and AMD join RapidIO.org; Imagination adds some details to wearable devices.

Envisioning the future scenario of the connected kitchen, Dylan Jarson, considers the inter-cusine communication but also the demands this will place on data centers and the changes that this may mean. (His vision of appliances talking to you and to each other makes a refreshing change from the teenager monologue heard in our kitchen: “What is there to eat? When’s lunch? I’m hungry/starving/famished”.)

Cadence, just like Pink, wants to get this party started. Steve Carlson celebrates and urges everyone to join in the SoC verification and even provides a comprehensive list of ingredients (and diagrams) needed for a good mix of progress and innovation.

An interesting premise is proposed by Tom De Schutter, enjoy what is not there. He is talking about hardware-free software development and adapts a gluten-free marketing slogan, for engineers who might be hardware-intolerant.

Steve Leibso delivers RapidIO news – ARM and AMD have joined the switched fabric interconnect organization. Xilinx, as a RapidIO.org member will track the 64bit processor in preparation for the 64bit processor specification.

Part of a series, Alexandru Voica adds some stats about wearable devices to pad out a ‘teaser blog’ with links to two SoCs from Imagination’s partners.