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Posts Tagged ‘Mechanical CAD’

Tech Travelogue June 2017 – Moore-Metcalf, IOT Chasm, Mechanical Design and 5G

Thursday, August 31st, 2017
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EDA in the Age of the System

Monday, July 31st, 2017

Learn from other industries to gain a system’s perspective was the reoccurring theme of Garysmith EDA analyst Laurie Balch’s pre-DAC address.

By John Blyler, Editor-in-Chief, ESDE

Once again, the system took center stage at the recent Design Automation Conference (DAC), an event focused on the software tools required to developed semiconductor system-on-chip (SOC) devices. These software tools typically fall under the heading of electronic design automation (EDA).

As per tradition, DAC kicked-off with a Sunday night “state of the industry” address by the analysts at GarySmith EDA (GSEDA). This year’s event was presented by Laurie Balch, Chief Analyst at GSEDA (see Figure 1).

Figure 1: Laurie Balch, Chief Analyst at GSEDA, presents EDA trends at DAC 2017 in Austin, TX.

She began by highlighting the positives with the chip design industry, starting with the diversity of both larger established and smaller start-up companies. Further, EDA is a mature market where litigations among the companies has more or less subsided. Finally, the chip industry is still very dynamic with lots of new product development.

The bad news is that there will be no double-digit growth for the traditional EDA space in the near future, at least not without a few changes, explained Balch (see Figure 2). More on that shortly.

EDA Growth Chart

Figure 2: Double-digit growth is not expected anytime soon for the EDA industry. (Courtesy GSEDA)

Broadening the Core

This begs the question as to the meaning of the traditional EDA landscape. In the past, EDA has provided tools in a number of development abstraction areas, including semiconductor chip gate-level and register transfer level (RTL) design-verification, electronic system level (ESL) design, packaging and interfaces to IC Computer-Aided Design (CAD) and Printed-Circuit Board (PCB) design.

“Since EDA is a maturing market, the industry needs to more beyond the traditional definition,” explained Balch. “In addition to the core EDA space, we have to include the embedded, mechanical and IP markets. These peripheral markets are central to understanding the future growth potential of EDA (see Figure 3).”

EDA Peripheral Markets

Figure 3: Expanded view of EDA markets and growth potential. (Courtesy of GSEDA)

Engaging with customers on the intersecting markets means that semiconductor companies must think about high-level systems. This is not a new observation. At last year’s DAC-2016, Balch predicted that EDA will see mechanical CAD vendors coming onto tradition semiconductor turf. This was confirmed with the recent acquisition of long-time EDA giant Mentor Graphics by Siemens PLM, a global systems, software and CAD business.

Mechanical CAD is only one of three markets that will help expand revenues to the traditional EDA market. The growth of semiconductor and embedded intellectual property (IP) over the last several years has already improved the revenue outlook. Adding mechanical design and embedded software will lead to further revenues, noted Balch.

Popular Tools

What were purported to be the hot new EDA market spaces at this year’s DAC? Balch provided the following list:

  • Analog/Mixed-Signal/RF
  • Emulation
  • System-Level Tools
  • Intellectual Property (IP)
  • Simulation & Verification
  • Circling the edges of EDA
  • Automotive

This list has changed little from previous DAC events. Perhaps the only difference now has been from the recent flurry of acquisitions which resulted in market share shifts among the three major EDA vendors.

What Does it Mean?

Today’s EDA is a market in transition, one that faces many challenges. Balch listed four main concerns:

  • Disappearance of double digit growth
  • Disruptive change vs. process improvement
  • Shift in vertical industry influences
  • IoT design impact

The disappearance of double-digit growth in traditional EDA markets has already been covered. Balch didn’t see disruptive changes in the market but rather a move toward more efficient methods in the overall chip development process. This was taken as a good move as process improvement is the right mindset for system development, she noted.

A shift to vertical markets could be a good thing for EDA, e.g., consider the rising growth in the automotive sector.

Perhaps the real challenge to EDA tool vendors is the rise of the Internet-of-Things (IOT). Designing for IOT requires changing some ways that EDA designs and offers their own tools, noted Balch. One big different is that most IOT designs don’t required the lowest and most expensive manufacturing nodes. I’ve noted other differences in the IOT design approach in other articles. (See, “Why is Chip Design for IOT so Hard?”)

Path Forward

One way to gain perspective on today’s EDA market is to look at it from another angle. For example, perhaps the mechanical design market will serve as a template for EDA. Balch pointed out the EDA originally grew out of the mechanical CAD space. Another comparison point is that mechanical CAD tools had a slow growth period similar to the one facing EDA. The latter emerged from its doldrums with new strategies that included reaching out to other markets.

Another change of perspective is afforded by the so-called “tall, thin engineer.” In the chip community (referencing Howard Sachs), a tall-thin engineer was a generalist with broad knowledge in many different fields rather than a specialist deeply involved in only areas, say IC design or layout.

Personally, I find this term misleading. A “tall, thin engineer” seems more indicative of a specialist, i.e., someone who has a deep (or tall) understanding in a very narrow (or thin) area of technology – for example, designing digital Silicon chips. In markets outside of EDA, the “tall, thin engineer” is known simply as a systems or systems-of-systems (SOS) engineer. Even this subtle difference in semantics highlights the difficulty that domain and EDA semiconductor engineers will face when expanding into peripheral markets like embedded software and mechanical systems.

Regardless of the semantics, many technical folks touch upon electronics, meaning that they have to deal with electronic issues for which they are not specialists. EDA can help them navigate the technical challenges but only if EDA itself has more generalists that understand the end-users perspective. Thus, the process by which EDA tools are developed would also need to be different. Balch noted that the tool obstacle was confronted by the mechanical community years ago, specifically in Computer-Aided-Engineering (CAE) tools for simulation. The result was new tools that could be used by engineers who were not experts.

Finally, vertical markets are directly influencing the EDA tool market. In the automotive space, Tier 1 companies are forcing their users to use specifically-qualified tools, e.g., ISO-26262. This influence will only continue. (See, “Fit-for-Purpose Tools Needed for ISO 26262 Certification”)

There are encourage signs that the EDA community is embracing other markets. Many presentations at this DAC focused on the new and rising markets of big data, machine learning and artificial intelligences.

EDA Call to Action

In conclusion, Balch listed three activities that would help rejuvenate the EDA community:

  • Recognition of EDA realities
    • Risks of standing still
  • Learn from parallel markets
    • Model for navigating the future
  • Repurposing EDA expertise
    • Creativity in abundance
  • Be fearless!

Foremost on the list was the theme of her presentation, namely, that future EDA strategies must continue to embrace the larger system world. The systems-view will help the community look and learn from other markets, esp. mechanical design.

“We should look at their history and see how they solved similar problems,” emphasized Balch.

The EDA space is well positioned to re-purpose their expertise into new markets, e.g., mechanical design, IP, embedded software and vertical markets like automotive and

Finally, Balch admonished the attendees to be fearless when seeking expanded markets, perhaps by focusing on design data management as well as high level physics-based technologies.

System Design Enablement – Looking Beyond the Chip

Thursday, July 23rd, 2015

By Craig Cochran, VP Corporate Marketing Cadence

Rapid changes are occurring in the way electronic products are developed. Driven by increasing integration and complexity, a growing number of systems companies are assuming more control over hardware, software, and mechanical development. Semiconductor makers are dealing not only with the physics of advanced process nodes, but are also expected to provide much of the embedded software for each system on chip (SoC). It’s time for the EDA industry to expand its focus beyond hardware IC design and to embrace System Design Enablement (SDE), an expanded mission that will provide tools, design content, and services for the development of whole systems or end products.

Until very recently, most electronic products were created from the bottom-up by isolated groups of developers with minimal interaction. This was true across intellectual property (IP), semiconductor, software, foundry, packaging, and systems companies. The complexity of modern-day systems, the compression of development timelines, and the pressure for product differentiation make this kind of development unfeasible, driving a shift towards the integrated design efforts we’re seeing from system companies.

While semiconductors are at the heart of any electronic system, there is much more to consider. In many electronic systems, software represents the greatest cost and biggest bottleneck.  Thermal and power restrictions apply across the chip, package, and board. Form factor and user experience impact mechanical design. Every part of the resulting system is interrelated and must be optimized concurrently to produce a leading product.

For many years, the EDA industry has focused on delivering tools to semiconductor companies to enable chip design. We call this “core” EDA, and it will remain a vital technology. With an eye to the future, successful core EDA companies will move up to system design with SDE. As shown below, SDE calls for the convergence of electrical, software, and mechanical domains, and its outcome is not just a chip but an end product.

Vertical Aggregation and Disaggregation Drive SDE

There was a time when chip design was confined to large companies with the capability to fabricate chips. Now we are in an era of fabless semiconductor companies and pure-play foundries, and as a result, hundreds of companies are engaged in IC and/or IP design. This has enabled a tremendous wave of innovation and creativity, but it has also resulted in a disaggregated product design chain.

Today, some systems companies across a variety of vertical markets are choosing to re-aggregate (albeit without chip manufacturing), with the end goal of ensuring a high-value product. For example, some of the world’s largest systems companies have created in-house chip design teams. These vertically integrated systems companies form a natural market for SDE tools and flows.

Meanwhile, semiconductors are representing a larger part of the overall value of the end products. This is one reason why systems companies are adding semiconductor design capability to their engineering teams. And systems companies expect that their semiconductor suppliers, be they in-house design groups or third parties, provide much of the software stack including drivers, OS, and middleware.

Tooling and IP for SDE

Embedded software development traditionally begins very late in the overall cycle, thereby becoming the critical path to product shipment. Hence there’s an urgent need to “shift left” and allow embedded software development and hardware/software verification to begin much earlier. SDE tools and flows support this added software responsibility by providing a continuum of pre-silicon development platforms that support hardware/software co-design and co-verification, virtual platforms, emulation, simulation, and FPGA-based prototyping.

Other tools and capabilities that support SDE include multi-fabric power, thermal, and signal integrity analysis; chip/package/PCB co-design; incremental co-design between EDA and Mechanical CAD (MCAD) tools; design of MEMS devices within custom/analog IC flows; and the development of 2.5D and 3D IC packages. All these capabilities are available today.

System Design Enablement is not just about design tools – it requires design content as well. At the chip level, that content is increasingly provided by reusable semiconductor IP blocks. Today as much as 80% of an SoC may be composed of such blocks, which may include processors, memory, communications protocols, analog functions, and verification IP (VIP).

Conclusion

As system complexity grows, the various components of an electronic system can no longer be designed in isolation. The focus of EDA needs to expand from single chips and boards to entire systems. This new challenge is addressed by System Design Enablement, and it requires tools, IP, software content, and services aimed at making whole systems possible. SDE opens a new chapter in the history of electronic system design, and it will greatly expand the reach of EDA technology to meet the challenges of today’s vertically integrated companies and their highly differentiated designs.

Craig Cochran is the vice president of corporate marketing at Cadence Design Systems, Inc. He has more than 20 years of corporate, strategic and product marketing expertise at EDA and electronics companies including Real Intent, ChipVision Design Systems, Jasper Design Automation and Synopsys. He began his career as an applications engineer at Valid Logic Systems and a digital design engineer at General Electric. Cochran holds a bachelor of science degree cum laude in electrical engineering from the Georgia Institute of Technology.