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Determining a Fair Royalty Value for IP

Monday, March 13th, 2017

Gabe Moretti, Senior Editor

The legal case between Apple and Qualcomm made me ask: “What is a fair royalty a supplier can charge a user?”  The answer is not clear, since the product that uses the IP can benefit in many different way from the IP.  I asked a few questions to exponents of the IP business and I received answers that, even if they do not provide one solution, clear the issue significantly.

In this article I will cover answers from Robert (Bob) Smith, executive director of the ESD Alliance, Warren Savage, general manager of IP at Silvaco, Farzad Zarrinfar, Managing Director of Novelics, Mentor Graphics, and Grant Pierce, CEO of Sonics and also Chairman of the Board of the ESD Alliance.

I am publishing Grant’s response as a separate article with the title: “Behold the Intrinsic Value of IP “.

It must be noted that the ESD Alliance has launched a project called “IP Fingerprinting Initiative” using technology from Silvaco.

Chip Design (CD): Should royalties be fixed at a certain amount regardless of the sale price of the unit that use the licensed IP? Or, should royalties be a percentage of the price charged to the customer of the end product?

Robert Smith (RS): Royalties should be based on value provided. Value comes in many forms, such as how much of the functionality of the end product is provided by the IP, the risk and time-to-market reduction, and design and verification cost savings. There is no simple formula for IP royalties. In fact, they can be quite complicated.

Warren Savage (WS): Business models used for licensing royalties are ALWAYS a negotiation between the buyer and seller with each party striving to optimize the best outcome for their business. In some cases, the customer may be willing to pay more for royalties in exchange for lowering the upfront licensing costs. A different customer may be willing to invest more upfront to drive down the cost of royalties. Calculation of the actual royalty amounts may be based on a percentage of the unit cost or a fixed price, and each may have sliding scales based on cumulative volumes. Both parties need to derive the value that fits their own business model. The IP user needs to arrive at a price for the IP that supports the ROI model for the end product. The IP supplier needs to ensure that it receives sufficient value to offset its investment in IP development, verification and support. It is able then to participate in the success of the buyer’s product based (at least in part) on the value of the IP provided.

Farzad Zarrinfar (FZ): No. It will not be practical.  Royalty is a form of payment for IP licensing. Using royalty-based payment, IP providers can share the business risk and rewards with IP users.  Royalty is typically “negotiable” and is dependent to a variety of parameters such estimated volume, estimated product life, IP value, the amount of R&D invested in IP development, the business model for IP suppliers, competitive landscape for IP, and others. In reality, good relationships between IP users and IP providers are important in developing a win-win business model.  IP royalty is negotiable. However, some of the most utilized models are:

  • Royalty fee, as a percentage of end product selling price (i.e. the selling price of packaged IC)
  • Royalty fee, as a percentage of end-product cost (i.e. die cost)
  • Royalty fee, as a percentage of wafer revenue that the foundry generates
  • Royalty fee, as a portion of cost saving that IP providers offer to IP users.

CD: What is the intrinsic value of an IP?

WS: An IP has ZERO intrinsic value in of itself. The value is completely dependent on the application in which it is used, the ability of the IP to offset development costs and risks and the contributions it makes to the operation and success of the target product. For example, an IP that is developed and ends up sitting on the shelf has no value at all. In fact, its value is negative given the resources and costs spent on developing it. Size doesn’t matter. An IP that has hundreds of thousands of gates may command a higher price because the IP supplier needs to sell it for that price to recoup its investment in creating it.  A small IP block may also command a high price because it may contain technology that is extremely valuable to the customer’s product and differentiates it significantly from the competition. The best way to think about intrinsic value is to think of it in the context of value delivered to the customer. If there is no apparent difference in this regard between an IP product from two or more suppliers, then the marketplace sets the price and the lowest cost supplier wins.

FZ: It depends from various situations such as;

The value could be related to the cost saving for IP user. In the slide below, several cost savings have been calculated.

The value could be related to the time-to-market saving or the saving for IP implementation. These will impact “build vs buy” decisions.


How many times can the owner of the IP charge for its use in the same system to the same customer?

WS: This again is a negotiation determined by the buyer and seller. As long as both parties receive what they perceive as fair value, there is no magic number.

FZ: If I understand your question correctly, the typical licensing model is “step-function” or “flat”. In step-function, IP providers offer a licensing fee for “First-Use”, “first-re use”, and “second re-use & beyond”. Therefore, the more designs customers do, proportionally, more IP builders generate revenue. In addition, royalty revenue for differentiated IPs offer scalable business for IP providers. Therefore, more successful and higher volume the chip supplier gets, will also benefit IP provider by royalty.

Royalty can be paid in several forms. Following are several popular royalty payments:

  • Per parts
  • Per wafer
  • Buy out
  • Buy down
  • Royalty with Cap
  • Royalty with step function

It is also important to structure a solid tracking system to track and verify the proper value of paid royalty. In this case, as President Ronald Reagan said “I trust you, but I need to be able to verify”.

CD: How can the owner of the IP protect it from illegal use by customers?[NVC1]

WS: This is the great problem we have in the IP industry today. Approximately 99% percent of IP is delivered to customers in source code form and IP companies rely on the good faith of their customers to use it within the scope of the license agreement. However, there is a fundamental problem. Engineers rarely know what the usage terms and restrictions of the agreement their company has with the IP supplier, so it is quite easy for a semiconductor company to be in violation—and not even know it. New technologies are coming into play, such as the IP fingerprinting scheme that the ESD Alliance is promoting. Fingerprinting is a “non-invasive” approach that protects both IP suppliers and their customers from “accidental reuse.”

RS: IP suppliers can utilize The Core Store (www.the-core-store.com) at no charge to showcase their products and register “fingerprints” of their technology. Semiconductor companies can use this registry to detect IP usage within their chips by means of “DNA analysis” software available through Silvaco.


[NVC1]Warren and Bob changed the question a bit.

Blog Review – Monday, February 27, 2017

Monday, February 27th, 2017

Intel and the IoT at Mobile World Congress; Hardware rally cry; Space race; UVM update; Keepng track of heritage with archaeological tools

It’s Mobile World Congress this week, in Barcelona, Spain (February 27 to March 2). Alison Challman, Intel, rounds up some of the IoT highlights at the show, encompassing automated driving, the smart city and smart and connected homes.

Putting some pep into hardware design, Dave Pursley, Cadence, advocates hardware designers adopt a higher level of abstraction and then synthesizing to RTL implementations via high-level synthesis to get happy.

Lamenting the slow pace of space electronics technology compared with commercial products, Ross Bannatyne, Vorago Technologies, reports on the company’s ARM Cortex-M0 MCU in the SpaceX Falcon 9, which headed for the International Space Station.

Reflecting on the development of UVM1.2, Tom Fitzpatrick, Mentor Graphics, charts the progress of the Universal Verification Methodology (UVM) and how the to tackle compatibility with earlier versions. More can be discussed at this week’s DVCon US at the company’s booth.

Exploring Android, using Qt tools is the topic explored by Laszlo Agocs, Qt, with example of how to develop Android TV Vulkan content. His blog is a guide to building a qtbase for Android, targeting the 64-bit architecture of the Tegra X1-based NVIDIA Shield TV, using QtGui, QtQuick modules.

Digital preservation captures physical, important sites, which may be at risk, or lost completely, through earthquakes, floods, the passage of time and human threats. Alyssa, Dassault Systemes, has found some examples by CyArk that is preserving sites and how virtual reality headsets can make the sites accessible.

Caroline Hayes, Senior Editor

Blog Review – Monday, February 13, 2017

Monday, February 13th, 2017

Among this week’s topics: two important announcements: the OpenFog Consortium and IEEE Standard for the Functional Verification Language e; a panel discusses the Internet and beyond; Mentor Graphics applies IoT to PCB design; FASTR accelerates the connected car and why USB is not as easy as 123

The importance of IP blocks is a given, but Rocke Acree, ON Semiconductor, explains how selection also has to consider technology and support tools. The company has collaborated with Hexius Semiconductor to qualify analog IP blocks to reduce design cycles and development time.

There are specific constraints, challenges and design requirements for PCBs designed for the burgeoning IoT market. John McMillan, Mentor Graphics has created a two-part blog focused on this topic.

Doing a quickstep around the topic of USB, Eric Huang, Synopsys, explores verification and FPGA prototyping for best results. He recommends some design rules, a test site, then curiously, throws in some political comment, a film review and dance-related jokes to end the blog.

It may not be an understatement by Rhonda Dirvin, ARM, to say that the day the OpenFog Consortium announced its reference architecture is the day we have all been waiting for. Hyperbole? Possibly not, as it defines how secure, interoperable products should be built – just what the connected world needs. She helpfully includes a link to the architecture, and a heads-up on a presentation at Mobile World Congress in Barcelona, Spain (Feb 27 to March 3).

If there is an award for Most Apt Acronym, the Future of Automotive Security Technology Research (FASTR) consortium, must be a contender. The uncredited Rambus blog reviews the brief history of the consortium, and discusses its recent manifesto, looking at why it is need for a secure, connected vehicle industry.

2017 begins with the publication of IEEE Std 1647 2016, the IEEE Standard for the Functional Verification Language e. of 2017. Efrat Shneydor, Cadence Design, looks at the enhancements which have been made and proficiently summarizes the highlights.

Generic connectivity is not enough – NASA has been designing, building and launching satellite systems with the goal of providing connectivity throughout the world. The concept and realities of the Internet of Space is the panel discussion topic, reported by John Blyler, Chip Design Magazine.

Caroline Hayes, Senior Editor

Blog Review – Monday, January 23, 2017

Monday, January 23rd, 2017

This week’s blogs show the human face of automated driving; and why energy should be taken seriously. There is lift-off for SpaceX to bring more satellite comms and a poetic turn, in the style of Rudyar Kipling’s classic poem.

There is a human element to automated driving, namely Human Machine Interface (HMI) and Jack Weast, Intel, uses his second blog post to examine how and why it can be used. He promises more in part three into the company’s research.

Energy is a serious business, says Grant Pierce, Sonics, and the electronics industry must shoulder some responsibility for power savings. The company, with Semico Research is conducting a survey and wants your help into understanding today’s and tomorrow’s power requirements.

Boosting the satellites to provide point-to-point communications, the SpaceX Falcon 9 rocket put the first 10 Iridium NEXT satellites into Low Earth Orbit (LEO), equipped with Xilinx space-grade Virtex-5QV FPGAs to implement the satellites’ On Board Processor (OBP) hardware. Steve Liebson, Xilinx, includes a link to a video describing the constellation and the launch.

Celebrating the relationship with Ericsson, Dassault Systèmes’ Olivier Ribet, looks at how the latter’s Networked Society will transform the way we interact with the world around us and meet technology challenges, such as 5G, IoT and the cloud.

Moving to 10nm and lower process geometries pushes the boundaries of FinFET and the custom layout flow and this means trouble ahead, warns Graham Etchells.

A touch of culture, with a poem “wot I wrote” by Keith Hanna, Mentor Graphics. He deftly tackles Computational Fluid Dynamics (CFD) as Rudyard Kipling might.

Image data and the mysteries of how to create, access and use a Qimage to greatest effect is detailed by Laszlo Agocs, Qt, with three case studies to illustrate what can be done.

A sharp video addressing the interconnect verification challenges is hosted by Nimrod Reiss. Cadence’s Corrie Callenbach has found and highlighted the video.

Caroline Hayes, senior editor

Blog Review – Tuesday, January 10, 2017

Tuesday, January 10th, 2017

Moving on from 4K and 8K, Simon Forrest, Imagination Technologies, reports on 360° video, as seen at this year’s CES in Las Vegas. That, together with High Dynamic Range (HDR) could re-energize the TV broadcasting industry in general and the set-top box in particular.

The IoT is responsible for explosive growth in smart homes with connectivity at their centre. Dan Artusi, Intel, considers what technologies and disciplines are coming together as it introduces Intel Home Wireless Infrastructure at CES 2017.

Announcing a partnership with Renault and OSVehicle, ARM will work with the companies to develop an open source platform for cars, cities and transportation. Soshun Arai, ARM, explains how the ‘stripped down’ Twizy can release the brakes on CAN development.

Some Christmas reading has brought enlightenment to Gabe Moretti, Chip Design, as he unravels the mysteries of CEO comings and goings, and why the EDA industry could learn a thing or two from the boards of spy plane and stealth bomber manufacturers.

Still with EDA, Brian Derrick, Mentor Graphics, likens the automotive industry to sports teams, where big names dominate and capture consumers’ interest, eclipsing all others. This is changing as electric vehicles become a super power to turbo charge the industry.

It’s always good to welcome new blogs, and Sonics delivers with its announcement that it is addressing power management. Grant Pierce, Sonics, introduces the technology and product portfolio to enhance design methods.

Caroline Hayes, Senior Editor

Blog Review – Tuesday, November 22, 2016

Tuesday, November 22nd, 2016

New specs for PCI Express 4.0; Smart homes gateway webinar this week; sensors – kits and tools; the car’s the connected star; Intel unleashes AI

Change is good – isn’t it? Richard Solomon, Synopsys, prepares for the latest draft of PCI Express 4.0, with some hacks for navigating the 1,400 pages.

Following a triumphant introduction at ARM TechCon 016, Diya Soubra, ARM, examines the ARM Cortex-M33 from the dedicated co-processor interface to security around the IoT.

Steer clear of manipulating a layout hierarchy, advises Rishu Misri Jaggi, Cadence Design Systems. She advocates the Layout XL Generation command to put together a Virtuoso Layout XL-compliant design, with some sound reasoning – and a video – to back up her promotion.

A study to save effort is always a winner and Aditya Mittal and Bhavesh Shrivastava, Arrow, include the results of their comparisons in performing typical debug tasks. Although the aim is to save time, the authors have spent time in doing a thorough job on this study.

Are smart homes a viable reality? Benny Harven, Imagination Technologies, asks for a diary not for a webinar later this week (Nov 23) for smart home gateways – how to make them cost-effective and secure.

Changes in working practice mean sensors and security need attention and some help. Scott Jones, Maxim Integrated looks at the company’s latest reference design.

Still with sensors, Brian Derrick, Mentor Graphics Design, looks at how smartphones are opening up opportunities for sensor-based features for the IoT.

This week’s LA Auto Show, inspires Danny Shapiro, NVIDIA, to look at how the company is driving technology trends in vehicles. Amongst the name dropping (Tesla, Audi, IBM Watson) some of the pictures in the blog inspire pure auto-envy.

A guide to artificial intelligence (AI) by Douglas Fisher, Intel, has some insights into where and how it can be used and how the company is ‘upstreaming’ the technology.

Caroline Hayes, Senior Editor

Blog Review – Monday 07 November 2016

Monday, November 7th, 2016

Browsing the MIT Library; AI and HPC for cancer breakthroughs; FPGAs on Mars; Romancing ISO 26262; It’s IoT conference season; Who’s going to pay?

For smart and connected IoT devices, Intel has introduced the Intel Atom processor E3900 and Ken Caviasca, Intel explains how the series brings computing power nearer to the role of the sensor.

Crash scenes from Mars, as taken by the Mars Reconnaissance Orbiter’s High Resolution Imaging Science Experiment (HiRISE) reveal features previously unseen on the planet. Steve Leibson, Xilinx, explains how we have FPGAs to thank. (For the images, not the crash!)

Ahead of GE’s Minds & Machines Conference (November 15-16, San Francisco) Lane Lewis, Ansys, celebrates the marriage of the Simulation Platform and Predix Platform to create a profitable asset health monitoring and the industrial IoT.

As mobile payment matures, Martin Cox, Rambus Bell ID, identifies that tokenization is becoming a hot topic. His blog explains the role of the company’s Token Gateway as a means to integrate multiple mobile payment schemes. No excuse not to get a round of drinks in now.

Moving automotive and safety into the realm of Dungeons and Dragons, Paul McLellan, Cadence, reviews the recent DVCon Europe and how ISO 26262 – the critical safety standard – became a theme, but not necessarily one to dread and fear or avoid. Like St George, you just have to grit your teeth and tackle it head-on, to find the pot of gold that is critical safety design success.

Fresh from IoT Planet in Grenoble, France, Andrew Patterson, Mentor Graphics, is occupied by two topics – connectivity and security. He shares some interesting thoughts and statistics around these gleaned from the event.

Fascinating insights into the world of bio-medicine and computational bio-medicine are provided by Dr Michael J McManus, Intel. He explains how Artificial Intelligence (AI) and High Performance Computing (HPC) are used by researchers to analyze data and predicts an era of revolutionary cancer breakthroughs, of both drug development structures and genome analytics running on a single Intel cluster using Intel Xeon, Intel Xeon Phi processors and Intel Omni-Path architecture.

There is a fascinating collection of rare books at MIT, exhibited to mark Ada Lovelace Day. For those can’t walk the aisles of the MIT Libraries, Stephen Skuce, MIT Libraries, shows us through some of the collection relating to women who have contributed to science, math and engineering with its annual celebration of the history of women in the STEM (Science Technology, Engineering and Mathematics) subjects.

Caroline Hayes, Senior Editor

Blog Review –Monday, October 24 2016

Monday, October 24th, 2016

The how, what and why of time-of-flight sensors; Conference season: ARM TechCon 2016 and IoT Solutions Congress; Save time on big data analysis; In praise of FPGAs; Is it time for augmented and virtual reality?

Drastically reducing big data analysis is music to a data scientist’s ears. Larry Hardesty reports on researchers at MIT (Massachusetts Institute of Technology) have presented an automated system that can reduce preparation and analysis from months to just hours.

Keeping an eye on the nation’s bank vaults, Robert Vamosi, Synopsys, looks at the what bank regulators are doing to ramp up cybersecurity.

If you can’t head to Barcelona, Spain this week for IoT Solutions World Congress (October 25-27), Jonathan Ballon, Intel, reveals what the company will unveil, including a keynote: IoT: From Hype to Reality, what 5G means, smart cities and a hackathon.

Tired of the buzz, and seeking enlightenment, Jeff Bier, Berkeley Design, delves into just what is augmented reality and virtual reality. He examines hardware and software, markets and what is needed for widespread adoption.

Closer to home, 2016 ARM TechCon, in Santa Clara, California (October 25 – 27), Phil Brumby, Mentor Graphics, offers a heads-up on its industrial robot demo, using Nucleus RTOS separated by ARM TrustZone, and the ECU (Engine Control Unit) demo in a Linux-hosted In-Vehicle Infotainment (IVI) system. There is also a technical session: Making Sure your UI makes the most of the ARM-based SoC (Thurs, 10.30am, Ballroom E)

The role of memory is reviewed by Paul McLellan, Cadence Design System, as he discusses MemCon keynotes by Hugh Durdan, VP of the IP Group and Steve Pwalowski, VP of Advanced Computing Solutions at Micron. There is comprehensive pricing strategy and a look at industry trends.

A teardown of the Apple iPhone 7, by Dick James, Chipworks, links STMicroelectronics’ time-of-flight sensors with the Starship Enterprise. The blog has a comprehensive answer to questions such as what are these sensors and why are they in phones.

If the IoT is flexible, Zibi Zalewski, Aldec, argues, then FPGAs can tailor solutions without major investments in an ASIC. He takes Xilinx’s Zynq-7000 All-Programmable SoC as a starting point and illustrates how it can boost performance for IoT gateways.

Elegantly illustrating how multiple Eclipse projects can be run on a single microcontroller with MicroEJ, Charlottem, ARM, runs through a connected washing machine that can communicate via Bluetooth, MQTT, Z-Wave and LWM2M.

Caroline Hayes, Senior Editor

Blog Review – Monday, October 10, 2016

Monday, October 10th, 2016

This week, bloggers look at the newly released ARM Cortex-R52 and its support, NVIDIA floats the idea of AI in automotives, Dassault Systèmes looks at underwater construction, Intrinsic-ID’s CEO shares about security, and there is a glimpse into the loneliness of the long distance debugger

There is a peek into the Xilinx Embedded Software Community Conference as Steve Leibson, Xilinx, shares the OKI IDS real-time, object-detection system using a Zynq SoC.

The lure of the ocean, and the glamor of Porsche and Volvo SUVs, meant that NVIDIA appealed to all-comers at its inaugural GPU Technology Conference Europe. It parked a Porsche Macan and a Volvo XC90 on top of the Ocean Diva, docked at Amsterdam. Making waves, the Xavier SoC, the Quadro demonstration and a discussion about AI in the automotive industry.

Worried about IoT security, Robert Vamosi, Synopsys, looks at the source code that targets firmware on IoT devices, and fears where else it may be used.

Following the launch of the ARM Cortex-R52 processor, which raises the bar in terms of functional safety, Jason Andrews looks at the development tools available for the new ARMv8-R architecture, alongside a review of what’s new in the processor offering.

If you are new to portable stimulus, Tom A, Cadence, has put together a comprehensive blog about the standard designed to help developers with verification reuse, test automation and coverage. Of course, he also mentions the role of the company’s Perspec System Verifier, but this is an informative blog, not a marketing pitch.

Undersea hotels sounds like the holiday of the future, and Deepak Datye, Dassault Systèmes, shows how structures for wonderful pieces of architecture can be realized with the company’s , the 3DExperience Platform.

Capturing the frustration of an engineer mid-debug, Rich Edelman, Mentor Graphics, contributes a long, blow-by-blow account of that elusive, thankless task, that he names UVM Misery, where a customer’s bug, is your bug now.

Giving Pim Tuyls, CEO of Intrinsic-ID, a grilling about security, Gabe Moretti, Chip Design magazine, teases out the difference between security and integrity and how to increase security in ways that will be adopted across the industry.

Blog Review – Monday, September 26, 2016

Monday, September 26th, 2016

Robotic surgery reaches new levels, and ARM raises safety critical benchmarks with Cortex-R52, supported by Synopsys tools. There is a preview of Intel’s DVCon Europe’s presentation for virtual systems and DTF proves to be a classic rulebook.

Described as a ‘fairy tale’ by the grateful recipient, surgeon using a joystick to remove a membrane from the patient’s eye could sound like an Orwellian nightmare, but Tom Smithyman, ANSYS, has collected his favorite blogs, one of which is on the BBC website and explains how surgeons at the John Radcliffe Hospital performed robotic-assisted eye surgery.

You may have heard that ARM launched its Cortex-R52, ARMv8-R processor and hot on the heels of the announcement, Synopsys has announced design support for safety critical automotive, healthcare and industrial applications, reports Phil Dworsky, Synopsys.

Still with ARM, Rob Coombs, explains how mobile security architecture can be adapted for IoT applications, with copious graphics and an introduction to TrustZone for ARMv8-M on microcontrollers.

The more things change, the more they stay the same, can be the conclusion reading a blog by Stephen Pateras, Mentor Graphics, who shows that DFT-related rules hold true now, as they did in the 1980s.

Is a coup is in the offing at the IEEE? John Blyler Systems Design Engineering, makes sure of the facts by checking with the current President-Elect, Karen Bartleson about the proposed amendment to the IEEE constitution ahead of next month’s vote.

DVCon Europe 2016 takes place in the German city of Munich next month and Jakob Engblorn, Intel, will present a paper there based on integrating SystemC models into a virtual system. For those who can’t attend in person, his blog previews his technical and informative paper.

Caroline Hayes, Senior Editor

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