By Ed Sperling
In what should prove to be an interesting dance, both Mentor and Synopsys are supporting OpenDFM and a single meta language called iDRC. The bottom line, hidden in the blog from Si2’s Steve Schulz, is that you can’t afford to not keep in step with TSMC in light of the recent foundry consolidation.

Mentor’s Calibre, meanwhile, appears to be getting some pretty good reception among users when compared with the competition—precisely because of its arrangement with TSMC. Check out John Cooley’s contribution on this subject.

In SoC development, everyone knows what “static” means. But when it comes to software, there are multiple definitions. Mentor’s Colin Walls takes a look at one of the reasons hardware and software engineers don’t always see eye-to-eye: their lexicon is different

In the semiconductor world, there are also multiple definitions of timing. Beyond that, there is good timing and there is bad timing. Bad timing is when you invest megabucks in capacity when there is no business. Check out Joanne Itow’s prediction for GlobalFoundries.

Synopsys’ Frank Schirrmeister digs into what we’ve all suspected, namely that the future of chip development is directly proportional to the ability to reduce the cost. The only way to do that is automation, of course. This is an interesting analysis.

Harry Gries digs down into the difference between bloggers and traditional journalists and what it means to DAC. This is a subject that will be argued about quite passionately for years to come. After that it will be included in history books–assuming there still are some.

Mentor’s Dennis Brophy takes a look at UVM testbench construction with sequence layering. For OVM adherents, this is like following the yellow brick road. For VMM devotees, there are some weeds in the way.

Cadence’s Richard Goering looks at analog ESL and concludes there is a glimmer of hope for progress. But at this point, it’s still a glimmer, so don’t start paring back the payroll just yet.

Paradigm Works’ Ambar Sarkar asks an interesting question: Did life get easier with TLM 2.0? For some people, the answer is yes. For others, not yet.

One of the beneficiaries of TLM 2.0 is Cadence. The Cadence-inspired industry direction, aka EDA360, is based heavily on high-level modeling, according to Ran Avinun, who predicts the world will look remarkably different in a couple years as it progresses.

Mentor’s Mike Jensen drills down into how to use VHDL-AMS to verify backward compatibility of application software. This opens the door wide to the other side. Interesting blog. http://www.mentor.com/products/sm/blog/post/vhdl-ams-revisited-3d24cc95-350a-4148-a729-2e331ad71b90

Synopsys’ Eric Huang talks about things to do with USB 3.0. If your chip has I/O issues, this blog is for you.

By Ed Sperling

Area, power and performance have been replaced by power, performance and cost when it comes to high-speed interconnects. And that may just be the starting point, with cost becoming the most important variable going forward. Check out the blog from Synopsys’ Navraj Nandra. Bean counters are coming to a design near you. At your next planning meeting, they’ll be the ones wearing ties.

Why is C so important? Mentor’s Colin Walls takes a stab at that question with a look at C and all the related languages. There’s a lot of good history here—enough to silence your colleagues as they listen in awe and wonder why you know this stuff.

Harry Gries takes the covers off his collection of 2010 predictions—as well as the gloves. This is a slam-bang look at the EDA world, naming names and kicking sand back in the faces of those who kicked it in the first place. Welcome to the new year.

While the big EDA vendors battle it out over OVM and VMM, it’s important to recognize that not everyone has such an advanced approach to verification. Mentor’s Jay O’Donnell takes a step back into the real world and how to get the most out of a directed test environment. This blog is loaded with great information for the companies that aren’t on the bleeding edge of Moore’s Law.

Speaking of VMM, Paradigm Works’ Ambar Sarkar takes a look at what to do with all those verification components that don’t work together. It’s part of Synopsys’ “Verification in the Trenches” series, which is another refreshingly real-world look at how people are using these tools.

Cadence’s Jason Andrews gives a chilling look at the blurred lines between work and home. Check out his screen shot and then check out the family photo. Yikes! It makes you want to release some Freon into the atmosphere.

Either high-level synthesis is a hot topic, or people don’t know enough about it to make a judgment call. But the subject certainly attracted the most readers for Mentor’s Thomas Bollaert in 2009.

And in the world of predictions, foundry relationship manager Daniel Nenni predicts the rise of the semiconductor-enabled mobile Internet. He’s not alone, in case you hadn’t noticed the new Google phone plastered all over the news.

New media seems to be getting its share of attention lately. Why now, when this trend has been underway for years? We’re not exactly sure. But the latest take comes from an engineer, which is interesting. Cadence’s Bob Dwyer interviews Ron Ploof about what’s driving the changes.