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Posts Tagged ‘PCI Express’

Blog Review – Tuesday, November 22, 2016

Tuesday, November 22nd, 2016

New specs for PCI Express 4.0; Smart homes gateway webinar this week; sensors – kits and tools; the car’s the connected star; Intel unleashes AI

Change is good – isn’t it? Richard Solomon, Synopsys, prepares for the latest draft of PCI Express 4.0, with some hacks for navigating the 1,400 pages.

Following a triumphant introduction at ARM TechCon 016, Diya Soubra, ARM, examines the ARM Cortex-M33 from the dedicated co-processor interface to security around the IoT.

Steer clear of manipulating a layout hierarchy, advises Rishu Misri Jaggi, Cadence Design Systems. She advocates the Layout XL Generation command to put together a Virtuoso Layout XL-compliant design, with some sound reasoning – and a video – to back up her promotion.

A study to save effort is always a winner and Aditya Mittal and Bhavesh Shrivastava, Arrow, include the results of their comparisons in performing typical debug tasks. Although the aim is to save time, the authors have spent time in doing a thorough job on this study.

Are smart homes a viable reality? Benny Harven, Imagination Technologies, asks for a diary not for a webinar later this week (Nov 23) for smart home gateways – how to make them cost-effective and secure.

Changes in working practice mean sensors and security need attention and some help. Scott Jones, Maxim Integrated looks at the company’s latest reference design.

Still with sensors, Brian Derrick, Mentor Graphics Design, looks at how smartphones are opening up opportunities for sensor-based features for the IoT.

This week’s LA Auto Show, inspires Danny Shapiro, NVIDIA, to look at how the company is driving technology trends in vehicles. Amongst the name dropping (Tesla, Audi, IBM Watson) some of the pictures in the blog inspire pure auto-envy.

A guide to artificial intelligence (AI) by Douglas Fisher, Intel, has some insights into where and how it can be used and how the company is ‘upstreaming’ the technology.

Caroline Hayes, Senior Editor

PCI-SIG-nificant Changes Brewing in Mobile and Small form Factor Designs

Wednesday, June 26th, 2013

Of five significant PCI Express announcements made at this week’s PCI-SIG Developers Conference, two are aimed at mobile embedded. It’s about time.

The big news from the PCI-SIG is speed. From PCI to PCI Express to Gen3 speeds, the PCI-SIG is an industry consortium that lets no grass grow for long. As the embedded, enterprise and server industries roll out PCIe Gen3 and 40G/100G Ethernet, the PCI-SIG and its key constituents like Cadence, Synopsis, LeCroy and others are readying for another speed doubling to 16 GT/s (giga transfers/second) by 2015.

The PCIe 4.0 next step would likely become known as “Gen4″ and it evolves bandwidth to 16Gb/s or a whopping 64 GB/s (big “B”) total lane bandwidth in x16 width. The PCIe 4.0 Rev 0.5 specification will be available Q1 2014 with Rev 0.9 targeted for Q1 2015.

Yet as “SIG-nificant” as this Gen4 announcement is, PCI-SIG president Al Yanes said it’s only one of five major news items.

Five PCI-SIG announcements at this week’s Developers Conference
The other announcements include: a PCIe 3.1 specification that consolidates a series of ECNs in the areas of power, performance and functionality; PCIe Outside the Box which uses a 1 – 3 meter “really cheap” copper cable called PCIe OCuLink with an 8G bit rate; plus two embedded and mobile announcements that I’m particularly enthused about. See Table 1 for a snapshot.

Table 1: There were five major announcements made by the PCI-SIG at June’s Developers Conference.
Figure 1: The PCI-SIG’s impending M.2 form factor is designed for mobile embedded ultrabooks, tablets, and possibly smartphones. The card will have a scalable PCIe interface and is designed for Wi-Fi, Bluetooth, cellular, SSD and more. (Courtesy: PCI-SIG.)

New M.2 Specification
One of two announcements for the mobile and embedded spaces, the new M.2 specification is a small, embedded form factor designed to replace the previous “Mini PCI” in Mini Card and Half Mini Card sizes (Figure 1). The newer, as-yet-publicly-unreleased M.2 card specification will detail a board that’s smaller in size and volume, but is intended to provide scalable PCIe performance to allow designers to tune SWaP and I/O requirements. PCI-SIG marketing workgroup chair Ramin Neshati told me that M.2 is part of the PCI-SIG’s deliberate focus on mobile in a fundamentally changing market.

The scalable M.2 card is designed as an I/O plug in for Bluetooth, Wi-Fi, WAN/cellular, SSD and other connectivity in platforms including ultrabook, tablet, and “maybe even smartphone,” said Neshati. At Rev 0.7 now, the Rev 0.9 spec will be released soon and the final (Rev 1.0?) spec will become public by Q4 2013.

Figure 2: The Mobile PCI Express (M-PCIe) specification targets mobile embedded devices like smartphones to provide high-speed, on-board PCIe connectivity. (Courtesy: PCI-SIG.)
Figure 3: M-PCIe by the PCI-SIG can be used in multiple high speed paths in a smartphone mobile device. (Courtesy: PCI-SIG and MIPI Alliance.)

Mobile PCIe (M-PCIe)
The momentum in mobile and interest in a PCIe on-board interconnect lead the PCI-SIG to work with the MIPI Alliance and create Mobile PCI Express: M-PCIe. The specification is now available to PCI-SIG members and creates an “adapted PCIe architecture” bridge between regular PCIe and MIPI M-PHY (Figure 2).

Using the MIPI M-PHY physical layer allows smartphone and mobile designers to stick with one consistent user interface across multiple platforms, including already-existing OS drivers. PCIe support is “baked into Windows, iOS, Android,” and others, says PCI-SIG’s Neshati.  PCI Express also has a major advantage when it comes to interoperability testing, which runs from the protocol stack all the way down to the electrical interfaces. Taken collectively, PCIe brings huge functionality and compliance benefits to the mobile space.

M-PCIe supports MIPI’s Gear 1 (1.25-1.45 Gbps), Gear 2 (2.5-2.9 Gbps) and Gear 3 (5.0-5.8 Gbps) speeds. As well, the M-PCIe spec provides power optimization for short channel mobile platforms, primarily aimed at WWAN front end radios, modem IP blocks, and possibly replacing MIPI’s own universal file storage UFS mass storage interface (administered by JEDEC) as depicted in Figure 3.

PCI Express Ready for More
More information on these five announcements will be rolling out soon. But it’s clear that the PCI-SIG sees mobile and embedded as the next target areas for PCI Express in the post-PC era. Yet the organization is wisely not abandoning the PCI Express standard’s bread and butter in high-end/high-performance servers and systems.

ciufo_chrisChris A. Ciufo is editor-in-chief for embedded content at Extension Media, which includes the EECatalog print and digital publications and website, Embedded Intel® Solutions, and other related blogs and embedded channels. He has 29 years of embedded technology experience, and has degrees in electrical engineering, and in materials science, emphasizing solid state physics. He can be reached at

Intel Maintains its ATCA Foothold

Friday, June 14th, 2013

Cheryl Coupe, Managing Editor

Experts discuss Intel challengers in high-performance, server-class processors, the move to 100G Ethernet and impact of new standards on ATCA-related markets.

It’s clear that 40G ATCA products are hitting the mainstream, especially in mobile infrastructure (especially LTE/4G) and data center applications (cloud, anyone?). And while ARM and AMD are making strong pushes into related markets, our experts say they’re not taking much away from Intel’s foothold—at least, not yet. We talked to Dr. Yong Luo, ADLINK Embedded Computer Segment; Rob Pettigrew, marketing director, Embedded Computing, Emerson Network Power; and David Hinkle, field applications engineer, Systems Group, Elma Electronic Inc. to get their input on these trends and more.

EECatalog: A year ago, the big move started to 40G Ethernet in all kinds of applications, systems and silicon. Where are we now?


Dr. Yong Luo, ADLINK Embedded Computer Segment: 40G is gradually becoming mainstream for all new ATCA products (blade, switch and chassis) both now and through the coming year. We fully expect the volume of 40G products on the market to ramp up over the course of 2014. Meanwhile, some 100G prototypes may be expected from early industry adopters as soon as late 2013. ADLINK and other vendors are running at full speed to push our own 40G ATCA blades and chassis to the market, but we do have some dependencies on our processor partners to produce the required 40G NIC and switch silicon.


Emerson: We’ve been shipping 40G-ready systems for a lot longer than a year! In fact, Emerson was the first major ATCA company to ship 40G-ready platforms, and one of the first to ship a working 40G switch blade and 40G payload blades. 40G fabric bandwidth is enabling ATCA to address two particular areas of focus—network intelligence applications with deep packet inspection (DPI), and mobile data optimization.


David Hinkle, Elma Electronic Inc.: We are beginning to see some boards showing up that support 40 Gig Ethernet, but the number of available boards is still quite small. We are seeing most of our customers building systems with 10 GigE boards due to their more prevalent availability.

EECatalog: Intel Core iX processors are being supplemented with other server-class initiatives such as DPDK, VPro and more. What effect is Intel’s expanded ecosystem having on ATCA, MicroTCA and the larger server and communications-class markets?

Luo, ADLINK: DPDK and QAT have started gaining some momentum in networking applications. We have seen some cost/performance advantages of DPDK in some not-so-deep DPI, Wi-Fi AC applications. However, QAT based on Intel Cave Creek may still have a performance gap in the fight against other multicore NPU solutions in the areas of security encryption and intensive DPI/DFI.

Emerson: The most commonly deployed ATCA payload blades are high-performance Intel Xeon processor blades, used traditionally for control plane applications, but increasingly used in the packet data path. The telecom industry loves to talk about the efficiencies and savings that can be gained by moving services to the cloud. A fundamental requirement of moving workloads to the cloud is to consolidate them on common, general-purpose hardware. Intel calls this workload consolidation. So Intel’s innovation in this area is helping enable ATCA to address telecom cloud applications.

Hinkle, Elma: Intel has worked very hard to infiltrate and own the server and telco markets.

EECatalog: As ARM-based processors, and to a lesser extent AMD-based APUs, creep into this market, what are you seeing, predicting or fearing?

Luo, ADLINK: ARM is certainly leading the way in the very low-power space, such as in the IOT market. We have not seen significant penetration of ARM or AMD APUs in the infrastructure space yet. As power-saving is becoming more and more critical, even in telecom infrastructure applications, ARM may gradually get a stronger foothold if Intel is not aggressively promoting the application and adoption of its advanced power management techniques.

Emerson: ARM-based processors are certainly penetrating the market traditionally served by Intel, particularly for end-user mobile devices. In the network datacenter, their use is generally restricted to application delivery platforms or web servers. The main market for ATCA generally requires high-performance, server-class processors, which is still a market that Intel dominates.

Hinkle, Elma: We are not seeing ARM processors coming into the ATCA and MicroTCA space, although we are seeing it in the smaller form factor arenas.

EECatalog: What’s new in the standards arena, either from PICMG or other?

Luo, ADLINK: PICMG 3.7 Cloud extension to ATCA is certainly a long-expected outcome from PICMG. Unfortunately, the standardization process may be taking too long.

Emerson: New technologies have resulted in blades that have pushed through the power and thermal envelope originally written in the ATCA specification, so it is being evolved to provide enough power and system airflow to accommodate several technology insertion cycles.

For the ATCA fabric, a logical next step would be the evolution of the current 40G Ethernet fabric to 100G. This step will require first the standardization of 100G Ethernet over a copper backplane by the IEEE, followed by the adoption of a 100G backplane standard by PICMG for ATCA. Such work is currently underway, and will most likely be complete within a few years.

Hinkle, Elma: Recently completed is MicroTCA.2 and the Physics Design Guide, while the COM Express Design Guide is nearly finished. CompactPCI Express was recently updated to 10 Gb/s channels, following an extensive and comprehensive engineering effort very comparable—and somewhat broader—than the work done for PICMG 3.1r2. However, interest outside of the PXIe community remains low at this point.

New work has begun on CompactPCI SO Extensions and MicroTCA.3r2. The large effort on the ATCA Extensions continues, as well as the xTCA Physics Software working group.

EECatalog: What new capabilities will PCI Express Gen 3 bring about?

Luo, ADLINK: The best part of PCIe Gen3 implementation that we’ve seen so far is the integration of many lanes of PCIe Gen3 into the CPU core directly. This has largely reduced the PCH bottleneck and brought huge improvements in terms of latency performance.

Emerson: With PCI Express Gen 3, we see the PCI Express bandwidth doubling from that which was available with the previous generation Gen 2. So it fundamentally doubles the available I/O bandwidth. Logical uses for this would be high-performance 40G ATCA fabrics, and high-performance storage interfaces.

Hinkle, Elma: It’s still early as there is little board level products supporting PCIe Gen 3.

EECatalog: What effect will InfiniBand have on the datacom/telecom/fast-server market?

Luo, ADLINK: Traditionally, people typically use InfiniBand for their needs on low-latency and high-bandwidth applications, if the cost is not their key concern, since it’s normally more expensive. However, at the early stage of 40G Ethernet in 2011, some customers/vendors have told us the total cost of a 50G+ InfiniBand solution may actually be less expensive than that of 40G Ethernet, especially due to the scarce supply of the 40G NIC (almost single source) and switch. This may have changed, though, as 40G Ethernet is getting more mature and the supply is ramping up. I guess there is a parallel situation in the gradual shift to 100G+ scenario now. Again, Intel isn’t acting quickly enough in this space with its InfiniBand acquisition.

Emerson: InfiniBand is typically used in datacenters as a high-performance, low-latency storage network interface, and as a high-performance fabric for connecting clusters of servers. Although for many applications, InfiniBand may have superior technical features than Ethernet, its use in the AdvancedTCA market has largely been rejected by the market in favor of Ethernet. This rejection was largely driven by the perception—and reality—that the much larger Ethernet market will drive innovation and economies of scale that simply cannot be matched by InfiniBand devices. I do not see this changing in the future, as Ethernet speeds increase to 100G and beyond.

Hinkle, Elma: As interesting as InfiniBand is for its high-bandwidth capabilities, we are not seeing it take hold in this market.

Cheryl Berglund Coupé is managing editor of Her articles have appeared in EE Times, Electronic Business, Microsoft Embedded Review and Windows Developer’s Journal and she has developed presentations for the Embedded Systems Conference and ICSPAT. She has held a variety of production, technical marketing and writing positions within technology companies and agencies in the Northwest.

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