By Ed Sperling
Cadence rolled out a low-power reference flow for SMIC’s 40nm process, from RTL to GDSII. What’s particularly noteworthy is just how fast SMIC moved ahead in process technology.

Arteris won a deal with MtekVision, which licensed its MIPI Low Latency Interface inter-chip link IP for multiple SoCs. The big selling point on LLI is it reduces the bill of materials by an entire memory chip.

TSMC’s net sales increased 9% in March compared with February, while revenue for Q1 increased 1.7% over the same period in 2011.

Intel inked a joint development agreement with the Beijing municipal government and the Chinese Academy of Sciences for research into a Chinese “Internet of Things.”

Carl Icahn stepped up pressure on Mentor Graphics, offering $17 per share in cash for all outstanding shares. Mentor’s stock was trading above $15 a share last week and the company was weighing its options.

The stock could show some pop on its own. Mentor reported that revenues were up 30% in Q4 vs. the same period in 2009 and earnings were up 10% on a GAAP basis. On a non-GAAP basis, earnings were up a whopping 60%. For the year, revenues were up 14% and GAAP earnings were 25 cents a share, vs. a 23-cent loss in 2009.

Mentor threw its weight behind UVM 1.0, which is no surprise. Aside from the benefits of a standards-based verification methodology, it’s also a good competitive strategy.

Synopsys rolled out data converter IP for SMIC’s 65nm low-leakage process. The IP is aimed at battery-powered communications and digital TV devices.

Cadence won a couple of deals. Broadcom is using Cadence’s Palladium XP acceleration and emulation technology. And IMS CHIPS, based in Stuttgart, Germany, standardized on Cadence’s silicon realization technology for mixed-signal gate arrays.

MIPS inked a deal to distribute the OEM version of Imperas’ Open Virtual Platforms simulator, aka OVPsim, which will allow customers to develop instruction-accurate simulation for MIPS processor cores.

By Ed Sperling
Synopsys expanded its DesignWare MIPI IP portfolio with support for a handful of new PHY protocols. The trend is an interesting one—big IP companies adding lots of support and configurability, making it far harder for small IP companies to keep pace.

In a similar vein, MIPS joined the MIPI alliance to support standard interfaces for mobile handsets.

SMIC adopted Cadence’s DFM and low-power silicon realization technology for its 65nm reference flow. The silicon realization technology includes a slew of different tools. Across the East China Sea, Fujitsu is supporting Cadence’s C-to-Silicon compiler for high-level synthesis.

Mobileye, which makes camera-based driver assistance systems, is using Arteris’ network on chip IP for its next-gen EyeQ SoCs. This stuff is really cool.

TSMC said its net sales for November dropped 4.4% from October, but before you hit the panic button that’s still up 21.7% from November 2009. One month does not make a trend even though it can cause sleep deprivation.

On the big picture side—literally—AMD, Dell, Intel, Lenovo, Samsung, and LG all said they would phase out analog display technology and move entirely to scalable and lower-power digital interfaces. That spells the end for VGA and LVDS panel interfaces. It might be time to trade in that old monitor.

By Ed Sperling
Intel unveiled a slew of announcements at the Intel Developers Forum (IDF). The most notable development was a deal to use Altera FPGAs in conjunction with Intel’s Atom chip, adding programmability outside the chip rather than trying to do everything with embedded software. If it’s successful, don’t be surprised if Intel starts cutting similar deals around its SoC development where platforms can be modified using an FPGA approach. It’s not quite as fast as having everything on the same chip, but not everything requires the same speed.

ARM likewise had a slew of announcements—which must have been a coincidence given the timing of IDF—that flex its international ecosystem leadership. ARM is collaborating with Dolby and India’s Ittiam in the audio sector.  Its Cortex-A9 processor is in a full computer-on-chip implementation from China’s Nufront. And it has hired a partner, FastCompanyBrazil, to make deeper inroads into Latin America’s growing tech market.

In the customer win category, Apache Design Solutions won a deal with Exar for its noise and reliability tools. Mentor’s DO-254 verification platform was adopted by the Civil Aviation University of China , Synopsys’ FastSPICE for circuit simulation was adopted by eMemory,  and Cadence’s silicon realization end-to-end product line was adopted by SMIC for 65nm to 40nm designs.  Global Unichip, the design services company in which TSMC has a major stake, also is using Cadence’s Encounter Timing System.

Synopsys introduced a serial advanced technology attachment IP solution for testing interoperability at process nodes ranging from 30nm to 40nm.

Actel, meanwhile, introduced its SmartFusion A2F500 development kit and said its largest SmartFusion Device is now in production using an ARM Cortex-M3 processor.

TSMC has begun building a thin-film solar R&D center and fab in central Taiwan.

By Ed Sperling

It was a busy week for Mentor Graphics. The company scored another DFM win, this time from SMIC, the Shanghai-based foundry. SMIC will use Calibre for signoff for 65nm and below. It also set up a shared emulation resource with Platform Computing.  And perhaps even more important, one of its development engineering managers, Vladimir Szekely won an award from the Hungarian Parliament for advanced transient temperature equipment.

Actel extended its SmartFusion FPGAs up into carrier-grade equipment with programmable ATCA systems, which is an interesting move for this market. In the past, most of the ATCA solutions involved swap-in modules in a standard chassis. This adds analog programmability for the first time through Actel’s Pigeon Point subsidiary.

Synopsys rolled out Design Compiler 2010 for its Galaxy flow. The company says the new tool will double the productivity of RTL synthesis and place and route.

Virage Logic teamed up with MIPS to offer optimized embedded memory IP for their joint customers. So who are the joint customers? Think set-top boxes and broadband.

Cadence added a couple dozen new companies to its ChipEstimate planning and IP portal. Virage and Xilinx ramped up their support.

eSilicon CEO Jack Harding was re-elected to the GSA board for the first time as a value chain producer, a new category created by the GSA to include eSilicon. It’s a good thing he got elected.

By Ed Sperling

It was a bad week for law firms, a good week for system engineers. But then again, what week isn’t good for system engineers?

Arteris made NoCs available for the masses—or at least for any chip with a bus. Given the complexity of even simple designs these days as even they move down the Moore’s Law curve to finer and finer geometries, this certainly can’t hurt. And understanding interconnects at the front end can make lots of things easier at the back end.

Along those same lines of growing complexity, Cavium signed a definitive agreement to acquire MontaVista Software, which makes embedded Linux. This is somewhat comparable to Intel buying Wind River for its real-time operating systems. It’s all about writing software that fits the core—and making the core fit the software. So much for the homogeneous core approach.

Lawyers take note: All those billable hours are going away. TSMC settled its IP theft litigation with SMIC. In a rather bizarrely worded announcement, TSMC said “the litigation and settlement have resulted in the full protection of TSMC’s trade secrets in the possession of SMIC.” And unlike in the U.S. courts, where settlements are kept quiet, SMIC has agreed to pay TSMC $200 million, which is in addition to the $135 million it paid in 2005. TSMC’s chairman, Morris Chang, said the case had been “amicably resolved.” Compared to what?

Also on the side of calling off the lawyers, AMD and Intel settled their patent disputes. Could it be that the two companies are playing together nicely? Hardly. Intel agreed to pay AMD $1.2 billion, which is probably cheap considering how much attention AMD has called to Intel’s business practices.

On the communications front, Pigeon Point Systems is now including Polaris Networks testers for formal validation of new releases of its xTCA line. This gives new meaning to in-line testing.

If you think things are bad, be glad you’re not in the Taiwanese foundry business—where the pain level is strangely uniform.

TSMC’s sales dropped 59.5% in February compared to the same month last year, and 7.5% compared to January. How many ways can you spell ouch? 

UMC’s numbers are down 56.9 percent in February 2009 vs. the same period in 2008. That’s pretty close. In fact, it’s remarkably close.

This kind of information is only available in Taiwan. SMIC, based in Shanghai, and Chartered, based in Singapore, don’t report monthly sales numbers.

Nevertheless, there was at least some encouraging news out of Chartered. It said that sales seem to be stabilizing and wafer starts appear to be increasing for Q2. 

There is evidence of this showing up in other parts of the market. U.S. retail sales, excluding big-ticket items like cars, show modest increases in areas like clothes and consumer electronics. Numbers were up in January and February. It certainly wasn’t a robust gain, but it wasn’t negative, either. That will translate into new design starts sometime in the next few months, which barring any more major drops will start this whole cycle rolling again.

Design activity has to begin at least six months prior to any turnaround, which means that if the overall economy is expected to show growth in 2010,  electronic designs have to begin by mid-year—perhaps even sooner.

None of this is perfect, however. Why, for example, did National Semiconductor just announce plans to cut 26% of its workforce? At least part of that can be explained by closing of an assembly and test plant in China and a fab in Texas. Too much capacity is expensive, and we wouldn’t be surprised if National ultimately begins outsourcing some of its work to foundries. Yes, it’s analog, but is it still more efficient to run fabs yourself, even if they’re fully depreciated, when TSMC and UMC are begging for business?

Meanwhile, in the FPGA realm, chip design is getting so complex that EDA vendors are finally beginning to find inroads. This is a market previously owned by tools from the FPGA vendors, which they readily gave away to customers at little or even no cost. That worked fine before the industry got to 90nm, and at 45nm it’s tough enough even with the best of tools.

Mentor introduced its Precision Synthesis Tool family for Altera’s Stratix and Arria families. Our guess is that you can expect to see a lot of activity in this market in the near future, and not just from Mentor. Synopsys’ purchase of Synplicity gives it a vested interest in the FPGA market, as well.

–Ed Sperling