Steve Longoria, senior vice president of Soitec, talks with System-Level Design about why silicon on insulator has suddenly become essential to semiconductor manufacturing and what it will mean for Moore’s Law.

By Ed Sperling
Mentor Graphics came under siege from corporate raider Carl Icahn, who claimed the company should be sold. Icahn’s group, which has bought up about 15% of Mentor’s stock, filed a proxy statement with the SEC to vote for its own officers on Mentor’s board. This could well be the most bizarre development in EDA history.

On a kinder and more productive note, Mentor won a deal with VIA Technologies, which makes low-power x86 processors. VIA is adopting the Calibre electrical rule checking product for electrostatic discharge analysis.

Synopsys is collaborating with Varian Semiconductor Equipment on process models for advanced logic and memory using Technology CAD models for cryogenic ion implantation. This is really interesting technology, but it makes it hard to explain at social gatherings what you do for a living.

Synopsys also introduced new technology for optimizing multicore systems. The company’s Platform Architect allows hardware-software partitioning and analysis well before the software is available. And it released a DDR memory controller that it claims has 30% lower latency and up to 15% higher throughput.

Apache Design Solutions rolled out its next-gen Chip Power Model for analyzing and optimizing the chip, the package and the system. This is a big step forward for advanced process nodes.

Tensilica introduced its DSP IP cores for LTE Advanced, which is the de facto 4G standard. Now you’ll be able to actually finish downloading mail before the cops pull you over and put your phone away.

Also in the LTE Advanced space, MIPS won a deal with Altair Semiconductor for its 4G LTE multithreaded processor IP.

A group of companies inside the SOI Consortium have created 20nm Ultra Thin Body Silicon on Insulator using fully depleted SOI. This is a major step forward for reducing current leakage. The wafers were provided by Soitec.

U.K.-based CSR is collaborating with TSMC on 90nm embedded flash process technology, IP and RF processes. Most of this stuff was being done at 180nm, so this is a two-node jump.