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Blog Review – Monday, January 25 2016

Monday, January 25th, 2016

In this week’s review, there is a Star Wars analogy, IoT security plans, a 30th anniversary and an unusual way of serving whisky

The dormant nature of some devices in the IoT are likened to the reawakening of Star Wars’ R2-D2 by Joe Hupcey III, Mentor Graphics. In an equally honorable and daring quest, he looks for the wisdom of ultra-low power design and verification for SoCs used in devices that wait a long time for reactivation.

FPGA with a dash of splash or on the rocks? Steve Leibson, Xilinx, explains how a bottle of fine whisky (scotch) ended up in a PC. It’s all in a good cause.

Three trends for embedded systems are identified by Amber Thousand, Critical Link. She explains how we should all be paying attention to user interfaces, the rise of complexity and integration, and a focus on core competencies.

This year marks 30 years since MIPS Computer Systems introduced the MIPS R2000 microprocessor chipset. Alexandru Voica, Imagination Technologies, considers the rise of RISC and where it has led.

Silicon is the best place to secure security features for the IoT, argues Matthew Rosenquist, Intel. He outlines the role Trusted Execution Environments (TEEs) play in the cyber future.

Clearly not a man that travels light, Navrai Nandra, Synopsys, concluded that if storage space is limited, instead of trying to close a bulging suitcase, think about moving up. His wait at the airport inspired an interesting blog on 3D stack technology to triple NAND capacity.

Looking at what the IoT design wins means for design at advanced nodes, Vassilios Gerousis, Cadence, considers the design rules for 10nm.

Caroline Hayes, Senior Editor

Blog Review – Monday, January 11, 2016

Monday, January 11th, 2016

In this week’s review, as one blog has predictions for what 2016 holds, another reviews 2015. Others cover an autonomous flight drone; a taster of DesignCon 2016 and a bionic leg development.

Insisting it’s not black magic or fortune telling but a retelling of notes from past press announcements, Dick James, Chipworks, thinks 2016 will be a year of mixed fortunes, with a low profile for leading edge processes and plenty of activity in memory and sensors as the sectors reap the rewards of developments being realized in the marketplace.

Looking back on 2015, Tom De Schutter, Synopsys, is convinced that the march of software continues and world domination is but a clock cycle away. His questions prompted some interesting feedback on challenges, benefits and working lives.

Looking ahead to autonomous drone flight, Steve Leibson, Xilinx, reports on the the beta release of Aerotenna’s OCPoC (Octagonal Pilot on Chip) ready-to-fly drone-control, based on a Zynq Z-7010 All Programmable SoC with integrated IMU (inertial measurement unit) sensors and GPS receiver.

Bigger isn’t always better, explains Doug Perry, Doulos, in a guest blog for Aldec. As well as outlining the issues facing those verifying larger FPGAs, he provides a comprehensive, and helpful, checklist to tackle this increasingly frequent problem, while throwing in a plug for two webinars on the subject.

Some people have barely unpacked from CES, and ANSYS is already preparing for DesignCon 2016. Margaret Schmitt previews the company’s plan for ‘designing without borders’ with previews of what, and who, can be seen there.

A fascinating case study is related by Karen Schulz, Gumstix, on the ARM Community blog site. The Rehabilitation Institute of Chicago has (RIC) has developed the first neural-controlled bionic leg, without using no nerve redirection surgery or implanted sensors. The revolution is powered by the Gumstix Overo Computer-on-Module.

Showing empathy for engineers struggling with timing closure, Joe Hupcey III, Mentor Graphics, has some sound advice and diagnoses CDC problems. It’s not as serious as it sounds, CDC, or clock domain crossing, can be addressed with IEEE 1801 low power standard. Just what the doctor ordered.

Caroline Hayes, Senior Editor

Blog Review – Monday, October 26, 2015

Monday, October 26th, 2015

Counting gates til the chickens come home to roost; Bio lab on a desk; Twin city goes digital; Back to the Future Day; Graphics SoC playground; Wearables get graphic

Something is troubling Michael Posner, Synopsys, when is a gate not a gate? He discusses the FPGA capacity of Xilinx’s UltraScale FPGAs and tries to find the answer. He also describes his Heath Robinson style light controlled chicken feeder he has installed in the chicken coop.

A desktop biolab sounds like something in a teenage boy’s room, but Amino is the ‘brainchild’ relates Atmel of Julie Legault. The Arduino-based bio-engineering system enables anyone to grow and take care of living cells. The mini lab allows the user to genetically transform an organism’s DNA through guided interactions. The Arduino-driven hardware monitors the resulting synthetic organism which needs to be fed nd kept warm. For those old enough to remember the Tamagotchi craze – it just moved up a gear.

3D computer models of buildings and cities take on a new role, demonstrated by Dassault Systèmes, whose 3DEXPERIENCity continuously generates the city as a digital twin city. Ingeborg Rocker explains how the IoT is used by the multi-dimensional data model which integrates population density, traffic density, weather, energy supply and recycling volumes data in real time to support city planners.

Recent acquisitions in the industry are analysed by Paul McLellan, Cadence Design Systems. Beginning with the acquisition of Carbon Design Systems by ARM, McLellan puts the deal in a market and engineering context. He moves on to the acquisition by Lam Research of KLA-Tencor and Western Digital which has bought SanDisk.

Putting the AMD R-Series through its paces, Christopher Hallinan, Mentor Graphics, delights in the versatility of the SoC, as discovered with Mentor Embedded Linux. He gives real-life examples of algorithms and how the visuals apply to industrial and scientific applications.

Celebrating a noteworthy date Back to the Future Day – October 21 2015 – Tobias Wilson-Bates, Georgia Tech, looks at how time travel has been portrayed in fiction. It gets philosophical: “One way to think about future speculations is to imagine that there are all these failed futures that co-exist with a present reality” but Marty would approve.

The acceptance of Mali-470 GPU to the wearables camp is complete. Dan Wilson, ARM, explains how the GPU is exploiting its OpenGL ES 2.0 graphics standard and power consumption for wearable and IoT applications.

Caroline Hayes, Senior Editor

Blog Review – Monday, July 27 2015

Monday, July 27th, 2015

IoT for ADAS; ESC 2015 focuses on security; untangling neural networks; what drives new tools; consolidation conundrum; IoT growth forecast; three ages of FPGA

Likening a business collaboration to a road trip may be stretching a metaphor that would make Jack Kerouac blush, but David McKinney, Intel, presses on as he explains Intel and QNX’s ADAS solution, based on Intel IoT for automobiles. He includes some interesting links and a video to inform the reader.

A review of ESC 2015 shows that Chris Ciufo is not only ahead of the curve, advocating embedded security, but also not one to pass by a freebie at a show. He relates some of the highlights from the first day of the Santa Clara event.

Neural network processors hold promise for computer vision, believes Jeff Bier, BDTI. His blog explains what work is needed for the scale of computation the industry expects.

Posing an interesting question, Carey Robertson, Mentor Graphics, asks what prompts the development of new tools. He blends this with helpful information about the newly launched Calibre xACT extraction tool, without too much “hard sell”.

“It works!” is the triumphant message of the blog co-authored by Jacek Duda and Steve Brown, Cadence. Reporting from this month’s workshop where Type-C USB was put through its paces.

What to do with wireless IP is asked and answered by Navari Nandra, Synopsys. He explains what can be done and how it can contribute to the IoT.

The SoC market is consolidating fast, says Rupert Baines, UltraSoC, on an IP Exteme blog. This poses two challenges that he believes licensed IP can simplify.

A common proposition is to move from Intel to ARM, and Rich Nass, ARM presents a well-rounded blog on how to make the transition, with some input from WinSystems hardware and software experts.

Forget consumer, the future of the IoT growth is in enterprise, reports Brian Fuller, ARM, observing analyst IDC’s webinar on which parts of the IoT will be lucrative and why.

Recalling the talk by Xilinx Fellow, Dr. Steve Trimberger, Steve Leibson, explains the three ages of the FPGA, with a link to a video on the history of the technology.

Caroline Hayes, Senior Editor

Blog Review – Monday, June 22 2015

Monday, June 22nd, 2015

Yonsei Uni team up for 5G; Hold that thought; now catch it; ARM and UNICEF; Industry and Education breathe life into EDA; Connected driving clears the road ahead

Researchers at Yonsei University have demonstrated a real-time, full-duplex LTE radio system at IEEE Globecom in Austin, Texas, using a novel antenna approach and working with National Instruments SDR platforms and LabVIEW graphical programming environment, reports Steve Leibson, Xilinx.

“Hold that thought” takes a new turn, as an anonymous blogger at Atmel describes the MYLE TAP, a wearable ‘thought catcher’. The touch-activate and voice-powered device automatically converts thoughts into actions. An interesting prototype or a recipe for disaster if it falls into the wrong hands?

Charity doesn’t always begin at home, sometimes it’s a warehouse in Copenhagen, Denmark. Dominic Vergine, ARM, visited the UNICEF global procurement hub and considers what wearable technology can provide, building on the low-tech, wearable technology of the MUAC band to test for malnutrition.

Building on a presentation at DAC 2015, Richard Goering, Cadence, considers how to academia and industry can work together to revitalize EDA.

The road ahead is smooth for the connected car, reports John Day, Mentor Graphics, if you are driving a Jaguar Land Rover (JLR), anyway. He examines the connected car technology that can identify and share data on potholes, broken manholes and other hazards.

Sloth is a deadly sin, especially in IP software development, warns Tom De Schutter, Synopsys, as he examines how laze in automotive testing can be absolved with virtual prototypes as an alternative to hardware, making earlier, broader, more automated software testing available.

Caroline Hayes, Senior Editor

Blog Review – Monday, June 08, 2015

Monday, June 8th, 2015

DAC duo announce DDA; Book a date for DAC with ARM, Ansys, Cadence; Synopsys and Xilinx; True FPGA-based verification

Announcing a partnership with Cadence Design Systems at DAC 2015, Dennis Brophy, Mentor Graphics teases with some details of Deug Data API (DDA). Full details will be unveiled at a joint presentation at the Verification Academy Booth (2408) on Tuesday at 5pm.

Amongst demonstrations of an IoT sub-system for Cortex-M processors, ARM will show a new IP tooling suite and the ARM Cordio radio core IP. There will be over a dozen partners, reports Brenda Westcott, ARM, in the Connected Community Pavillion and the ARM Scavenger Hunt. (DAC June 7 – 11, ARM booth 2428).

As if justifying its place at DAC 2015, Ravi Ravikumar, Ansys, explains how the show has evolved beyond EDA for SoCs. The company will host videos on automotive, IoT and mobile, and presentations from foundry partners. (DAC June 7 – 11, Anysys booth 1232).

If you are interested in the continuum of verification engines, DAC is the place to be this week. Frank Schirrmeister, Cadence, summarizes the company’s offerings to date, with a helpful link to a COVE (Continuum of Verification Engines) article, and provides an overview of some of the key verification sessions at the Moscone Center. (DAC June 7 – 11, Cadence booth 3515).

Back with FPGA prototyping system, HAPS, Michael Posner, Synopsys, invites visitors to DAC to come see the Xilinx UltraScale VU440-based HAPs. As well as proudly previewing the hardware software development support, he also touches on the difficulties of mapping ASICs to FPGAS.

More Xilinx-DAC news, as Doug Amos’s guest blog at Aldec, announces the era of true FPGA-based verification. He believes the end of big-box emulation is nigh, following the adoption of Xilinx’s Virtex UltraScale devices in its HES-7 (Hardware Emulation Solution, seventh generation) technology.

Caroline Hayes, Senior Editor

Blog Review – Monday May 18, 2015

Monday, May 18th, 2015

Zynq detects pedestrians; ARMv8-A explained; Product development demands test; Driving connectivity; Celebrating Constellations; Chip challenges

The helpful Michael Thomas, ARM, advises readers that there is The Cortex-A Series Programmer’s Guide for ARMv8-A available and introduces what is in the guide for a taster of the architecture’s features.

The Embedded Vision Summit gives many bloggers material for posts. The first is Steve Leibson, Xilinx, who includes a video Mathworks presented there, with a description if a real-time pedestrian detector running on a Zynq-based workflow, using MathWorks’ Sumulink and HDL Coder.

Another attendee was Brian Fuller, Cadence, who took away the secrets to successful product development, which he sums up as: test, test, test. (He does elaborate beyond that in his detailed blog, reviewing Mike Alrdred of Dyson’s keynote.

Anticipating another event, DAC, Ravi Ravikumar, Ansys, looks at the connected car and the role of design in intelligent vehicles.

Also with an eye on DAC, Rupert Baines, UltraSoC has a guest blog at IP-Extreme, and praises the Constellations initiative, with some solid support – and some restrained back-slapping.

Continuing a verification series, Harry Foster, Mentor, looks at the FPGA space and reflects on how the industry makes choices in formal technology.

A guest blog, at Chip Design, by Dr. Bruce McGaughy, ProPlus Design Solutions, looks at what innovative chip designs mean for chip designers. His admiration for the changing pace of design is balanced with identifying the drivers for low power design to meet the IoT portable phase.

Why do we need HDCP 2.2 and what do we need to do to ensure cryptography and security? These are addressed, and answered, by VIP Experts, Synopsys, in this informative blog.

By Caroline Hayes, Senior Editor

Blog Review – Monday, May 04 2015

Monday, May 4th, 2015

Steve Leibson, Xilinx, reports on an interesting academic program to ‘look at, poke, modify, and experiment with’ the MIPS RISC processor RTL using a simplified Imagination Technologies microAptiv processor core. The MIPSfpga program provides university CS and EECS departments access to a fully-validated, current generation MIPS CPU. There are also plans for the Imagination University Programme to expand this university program to the PowerVR graphics processors and FlowCloud IoT technology.

Two ARM server hardware platform used in cloud-based set-top box systems are explained in detail by Karthik Ranjan, ARM. The blog looks back at early cable TV systems and looks ahead to the IoT and cloud use in virtual network functionality (VNF) ahead of the VNF world Congress in San Jose this week.

In praise of an overlooked object-oriented language, Ruby, Michael Cizl, IP Extreme, presents a strong case and urges readers to rethink their choices.

Excitement is growing for the advent of Windows 10. Rambus speculates on the inclusion of a universal sensor driver set for environmental, biometric, proximity and motion sensing. Adam Shah, IDG, speculates on what this will mean for functionality for devices running the OS.

Wrestling with power, the panel of experts at the Electronic Design Processes Symposium, discussed if the industry needs to rethink tackling power for IoT devices in particular. Brian Fuller, Cadence, reports from the Monterey event.

Distilling a report from IHS Automotive, John Day, Mentor Graphics, identifies apps and trends that smartphones will bring to the in-car experience, from Apple to Android, with a graph of consumers’ preferences from Bluetooth for hand-free use, touchscreen to an auxillary hook to add an MP3 player or phone.

Returning to a familiar blog-topic, Michael Posner, Synopsys, compares hybrid prototyping vs prototyping bridges, using the company’s latest DesignWare Hybrid IP Prototyping Kits as a starting point for the IP prototyping discussion.

Caroline Hayes, Senior Editor.

Blog Review – Monday April 20, 2015

Monday, April 20th, 2015

Half a century and still quoted as relevant is more than most of us could hope to achieve, so the 50 anniversary of Gordon Moore’s pronouncement which we call Moore’s Law is celebrated by Gaurav Jalan, as he reviews the observation first pronounced on April 19, 1965, which he credits with the birth of the EDA industry, and the fabless ecosystem amongst other things.

Another celebrant is Axel Scherer, Cadence, who reflects on not just shrinking silicon size but the speed of the passing of time.

On the same theme of what Moore’s Law means today for FinFets and nano-wire logic libraries, Navraj Nandra, Synopsys, also commemorates the anniversary, with an example of what the CAD team has been doing with quantum effects at lower nodes.

At NAB (National Broadcasters Association) 2015, in Las Vegas, Steve Leibson, Xilinx, had an ‘eye-opening’ experience at the CoreEL Technologies booth, where the company’s FPGA evaluation kits were the subject of some large screen demos.

Reminiscing about the introduction of the HSA Foundation, Alexandru Voica, Imagination Technologies, provides an update on why heterogeneous computing is one step closer now.

Dr. Martin Scott, the senior VP and GM of Rambus’ Cryptography Research Division, recently participated in a Silicon Summit Internet of Things (IoT) panel hosted by the Global Semiconductor Alliance (GSA). In this blog he discusses the security of the IoT and opportunities for good and its vulnerabilities.

An informative blog by Paul Black, ARM examines the ARM architecture and DS-5 v5.21 DSTREAM support for debug, discussing power in the core domain and how to manage it for effective debug and design.

Caroline Hayes, Senior Editor

Blog Review – Monday, March 23, 2015

Monday, March 23rd, 2015

Warren Savage, IPextreme, has some sage, timely advice that applies to crossword solving, meeting scheduling and work flows.

At the recent Open Power Summit, Convey Computer announced the Coherent Accelerator Processor Interface (CAPI) development kit based on its Eagle PCIe coprocessor board. Steve Liebson, Xilinx, has a vested interest is telling more, as the accelerator is based on the Xilinx Virtex-7 980T FPGA.

Gloomy predictions from Zvi Or-Bach, MonolithIC 3D, who puts a line in the sand at the 28nm node as smartphone and tablet growth slows.

Saying you can see unicorns is not advisable in commerce, but Ramesh Dewangan, Real Intent has spotted some at Confluence 2015, but where, he wonders, are those for the EDA industry?

ARM’s use of Cadence’s Innovus Implementation System software to design the ARM Cortex-A72 is discussed by Richard Goering, Cadence. As well as the collaboration, the virtues of ARM’s ‘highest performance and most advanced processor’ are highlighted.

ARM has partnered with the BBC, reveals Gary Atkinson, ARM, in the Make it Digital initiative by the broadcasting corporation. One element of the campaign is the Microbit project, in which every child in school year 7 (11-12 years old) will be given a small ARM-based development board that they can program using a choice of software editor. Teachers will be trained and there will be a suite of training materials and tutorials for every child to program their first IoT device.

Mentor Graphics is celebrating a win at the first annual LEDs Magazine Sapphire Award in the category of SSL Tools and Test. Nazita Saye, Mentor Graphics, is in Hollywood Report mode and reviews the awards.

Responding to feedback from readers, Satyapriya Acharya, Syopsys, posts a very interesting blog about verifiying the AMBA system level environment. It is well thought out and informative, with the promise of more capabilities needed in a system monitor to perform checks.

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