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	<title>System-Level Design</title>
	<atom:link href="http://chipdesignmag.com/sld/feed/" rel="self" type="application/rss+xml" />
	<link>http://chipdesignmag.com/sld</link>
	<description>Deep Insights for Chip Architects and Engineers</description>
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		<title>EDA Revenue Up In Q1</title>
		<link>http://chipdesignmag.com/sld/blog/2012/07/11/eda-revenue-up-in-q1/</link>
		<comments>http://chipdesignmag.com/sld/blog/2012/07/11/eda-revenue-up-in-q1/#comments</comments>
		<pubDate>Wed, 11 Jul 2012 13:00:21 +0000</pubDate>
		<dc:creator>ann</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[EDA revenue]]></category>
		<category><![CDATA[EDAC]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=7192</guid>
		<description><![CDATA[Results showed continued growth for the EDA industry with every major category except Services reporting increased revenue, and every major region grew except Japan.]]></description>
			<content:encoded><![CDATA[<p>By Ann Steffora Mutschler<br />
The EDA Consortium Market Statistics Service announced this morning that EDA industry <a href="http://edac.org/downloads/pressreleases2012/MSS_Q1_2012_PressRelease_FINAL.pdf" target="_blank">revenue </a>increased 6.3 percent for Q1 2012 to $1536.9 million, compared to $1446.4 million in Q1 2011. Sequential EDA revenue for Q1 2012 decreased<strong> </strong>9.6 percent compared to Q4 2011, while the four-quarters moving average, which compares the most recent four quarters to the prior four quarters, increased by 13.4 percent.</p>
<p>Overall, Q1 results showed continued growth for the EDA industry with every major category except Services showed increased revenue, and every major region grew except Japan.</p>
<p>The results were strong, “in an absolute sense,” asserted Walden C. Rhines, board sponsor for the EDAC MSS and chairman and CEO of Mentor Graphics. “Six percent or greater in a semiconductor market that is growing less than that is good and actually, we tend to trail semiconductor by about a year so this is a little better than what semiconductor did last year so that’s in line.”</p>
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		<title>System Bits: July 10</title>
		<link>http://chipdesignmag.com/sld/blog/2012/07/10/system-bits-july-10/</link>
		<comments>http://chipdesignmag.com/sld/blog/2012/07/10/system-bits-july-10/#comments</comments>
		<pubDate>Tue, 10 Jul 2012 07:01:16 +0000</pubDate>
		<dc:creator>ann</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[carbon nanotubes]]></category>
		<category><![CDATA[imaging]]></category>
		<category><![CDATA[Rice University]]></category>
		<category><![CDATA[tungsten STM probe]]></category>
		<category><![CDATA[University of Illinois]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=7188</guid>
		<description><![CDATA[Snapping carbon nanotubes; sharpen probe for improved imaging.]]></description>
			<content:encoded><![CDATA[<p><strong>How </strong><strong>Nanotubes </strong><strong>Bend</strong><strong>, Break</strong></p>
<p>Researchers at Rice University have discovered that even though carbon nanotubes are 100 times stronger than steel and weighs one-sixth as much, they can be snapped like twigs by a tiny air bubble.</p>
<p>“We find that the old saying ‘I will break but not bend’ does not hold at the micro- and nanoscale,” said Rice engineering researcher Matteo Pasquali, the lead scientist on a new study that appears this month in the Proceedings of the National Academy of Sciences.</p>
<p>This work is key for researchers who want to make and study long nanotubes and shows how the ultrasonic vibrations used to separate and prepare nanotubes in the lab are a detriment to long nanotubes.</p>
<p>“We found that long and short nanotubes behave very differently when they are sonicated,” said Pasquali, professor of chemical and biomolecular engineering and of chemistry at Rice. “Shorter nanotubes get stretched while longer nanotubes bend. Both mechanisms can lead to breaking.”</p>
<p>Nanotubes can be used in paintable batteries and sensors, to diagnose and treat disease, and for next-generation power cables in electrical grids. Many of the optical and material properties of nanotubes were discovered at Rice’s Smalley Institute for Nanoscale Science and Technology, and the first large-scale production method for making single-wall nanotubes was discovered at Rice by the institute’s namesake, the late Richard Smalley.</p>
<div id="attachment_7189" class="wp-caption alignnone" style="width: 252px"><a href="http://chipdesignmag.com/sld/files/2012/07/bubbles.jpg"><img class="size-medium wp-image-7189" src="http://chipdesignmag.com/sld/files/2012/07/bubbles-242x300.jpg" alt="" width="242" height="300" /></a><p class="wp-caption-text">The mechanism by which carbon nanotubes break or bend under the influence of bubbles during sonication is the topic of a new paper led by researchers at Rice University. The team found that short nanotubes are drawn end-first into collapsing bubbles, stretching them, while longer ones are more prone to breakage. (Source: Pasquali Lab/Rice University)</p></div>
<p><strong>Sharpen Microscope Probe, Improve Resolution</strong></p>
<p>A simple, new <a href="http://www.news.illinois.edu/news/12/0705probes_JosephLyding_GregGirolami.html" target="_blank">improvement </a>to an essential microscope component could greatly improve imaging for researchers who study the very small, from cells to computer chips, according to Joseph Lyding, a professor of electrical and computer engineering at the University of Illinois, who led a group that developed a new microscope probe-sharpening technique.</p>
<p>Labs can spend hundreds of thousands of dollars on an elegant instrument – for example, a scanning tunneling microscope (STM) or an atomic force microscope (AFM) – yet the quality of the data depends on the probe. Probes can degrade rapidly with use, wearing down and losing resolution. In such cases, the researcher then has to stop the scan and replace the tip.</p>
<p>“To put it in perspective, if you had an expensive racecar but you put bicycle tires on it, it wouldn’t be a very good car,” Lyding said. To shape tips, researchers shoot a stream of ions at the tip. The material sputters off as the ions collide with the tip, whittling away the probe. One day in the lab, after yet another tip failure, Lyding had the simple, novel idea of applying a matching voltage to the tip to deflect the incoming ions. When a voltage is applied to a sharp object, the electrical field gets stronger as the point narrows. Therefore, ions approaching the sharpest part of the electrified tip are deflected the most and causing the ions to remove the material around that sharp part, not on the sharp part itself, and that makes it sharper.</p>
<div id="attachment_7190" class="wp-caption alignnone" style="width: 160px"><a href="http://chipdesignmag.com/sld/files/2012/07/probe_a.jpg"><img class="size-full wp-image-7190" src="http://chipdesignmag.com/sld/files/2012/07/probe_a.jpg" alt="" width="150" height="150" /></a><p class="wp-caption-text">A traditionally etched tungsten STM probe, sharpened to a 1-nanometer point after bombarding it with ions. (Source: University of Illinois)</p></div>
<p>To keep the probe tips from wearing down just as quickly as other probes, a coating of hafnium diboride was applied.</p>
<p><em>&#8211;Ann Steffora Mutschler</em></p>
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		<title>System Bits: June 18</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/18/system-bits-june-18/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/18/system-bits-june-18/#comments</comments>
		<pubDate>Tue, 18 Jun 2013 07:01:21 +0000</pubDate>
		<dc:creator>ann</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[Columbia University]]></category>
		<category><![CDATA[crystalline graphene]]></category>
		<category><![CDATA[CVD-grown graphene]]></category>
		<category><![CDATA[magnetic graphene]]></category>
		<category><![CDATA[magnetism]]></category>
		<category><![CDATA[Spintronics]]></category>
		<category><![CDATA[University of Manchester]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=9023</guid>
		<description><![CDATA[Graphene’s strength; controlling magnetism.]]></description>
			<content:encoded><![CDATA[<p><strong>The strength of graphene</strong><br />
Columbia Engineering researchers have demonstrated that <a href="http://engineering.columbia.edu/even-defects-graphene-strongest-material-world" target="_blank">graphene</a>, even if stitched together from many small crystalline grains, is almost as strong as graphene in its perfect crystalline form.</p>
<p>This resolves a contradiction between theoretical simulations, which predicted that grain boundaries can be strong, and earlier experiments, which indicated that they were much weaker than the perfect lattice.</p>
<p>Graphene consists of a single atomic layer of carbon, arranged in a honeycomb lattice. Earlier research studied the strength graphene can achieve if it has no defects—its intrinsic strength, but defect-free, pristine graphene exists only in very small areas. Large-area sheets required for applications must contain many small grains connected at grain boundaries, and it was unclear how strong those grain boundaries were. More recent research examined the strength of large-area graphene films grown using chemical vapor deposition (CVD), and the researchers said that graphene is back and stronger than ever.</p>
<p>Their work verified that commonly used methods for post-processing CVD-grown graphene weaken grain boundaries, resulting in the extremely low strength seen in previous studies. As such, the team developed a new process that prevents any damage of graphene during transfer. They substituted a different etchant and were able to create test samples without harming the graphene.</p>
<p>The findings clearly correct the mistaken consensus that grain boundaries of graphene are weak. They said this is great news because graphene offers such a plethora of opportunities both for fundamental scientific research and industrial applications.</p>
<p><strong>Controlling magnetic clouds in graphene</strong><br />
According to researchers at the University of Manchester, graphene can be made magnetic and its <a href="http://www.manchester.ac.uk/aboutus/news/display/?id=10201" target="_blank">magnetism switched on and off</a> at the press of a button. They expected this to open a new avenue towards electronics with very low energy consumption.</p>
<p>The researchers have shown how to create elementary magnetic moments in graphene and then switch them on and off, which is believed to be the first time magnetism itself has been toggled, rather than the magnetization direction being reversed.</p>
<p>Modern society is highly reliant on the use of magnetic materials, which have become an integral part of electronic gadgets where devices including hard disks, memory chips and sensors employ miniature magnetic components. Each micro-magnet allows a bit of information (‘0’ or ‘1’) to be stored as two magnetization directions (‘north’ and ‘south’). This area of electronics is called spintronics.</p>
<p>However, spintronics has not been able to deliver active devices, in which switching between the north and south directions is done in a manner similar to that used in modern transistors. This situation may dramatically change due to the latest discovery.</p>
<p>Graphene is a chicken wire made of carbon atoms. It is possible to remove some of these atoms which results in microscopic holes called vacancies. The Manchester researchers have shown that electrons condense around these holes into small electronic clouds, and each of them behaves like a microscopic magnet carrying one unit of magnetism, spin.</p>
<p>The researchers have shown that the magnetic clouds can be controllably dissipated and then condensed back. The breakthrough allows work towards transistor-like devices in which information is written down by switching graphene between its magnetic and non-magnetic states. These states can be read out either in the conventional manner by pushing an electric current through or, even better, by using a spin flow. Such transistors have been a holy grail of spintronics.</p>
<p>Previously, one could only change a direction in which a magnet is magnetized from north to south. Now they can switch on and off the magnetism entirely.</p>
<p><em>~Ann Steffora Mutschler</em></p>
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		<title>The Week In Review: June 14</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/14/the-week-in-review-june-14/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/14/the-week-in-review-june-14/#comments</comments>
		<pubDate>Fri, 14 Jun 2013 15:44:52 +0000</pubDate>
		<dc:creator>ed</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[BMW]]></category>
		<category><![CDATA[Bosch]]></category>
		<category><![CDATA[Cadence]]></category>
		<category><![CDATA[CEVA]]></category>
		<category><![CDATA[Dassault Systemes]]></category>
		<category><![CDATA[Evatronix]]></category>
		<category><![CDATA[Ferrari]]></category>
		<category><![CDATA[high-performance computing]]></category>
		<category><![CDATA[HP]]></category>
		<category><![CDATA[IBM]]></category>
		<category><![CDATA[IDC]]></category>
		<category><![CDATA[IHS iSuppli]]></category>
		<category><![CDATA[Imagination Technologies]]></category>
		<category><![CDATA[MEMS]]></category>
		<category><![CDATA[Mentor Graphics]]></category>
		<category><![CDATA[Pininfarina]]></category>
		<category><![CDATA[SilabTech]]></category>
		<category><![CDATA[STMicroelectronics]]></category>
		<category><![CDATA[Synopsys]]></category>
		<category><![CDATA[Texas Instruments]]></category>
		<category><![CDATA[TI]]></category>
		<category><![CDATA[VeriSilicon]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=9018</guid>
		<description><![CDATA[Synopsys rolls out memory compiler; Silab rolls out PHY using Mentor tools; Cadence wraps buy of Evatronix; Dassault inks deal with Pininfarina; HPC market up.]]></description>
			<content:encoded><![CDATA[<p><strong>Synopsys</strong> introduced an <a href="http://news.synopsys.com/index.php?s=43&amp;item=1133">ultra-high-density memory compiler</a> and a design kit that it says will optimize all processor cores on an SoC, with up to 10% improvement on CPU cores, up to 25% lower power and 10% area reduction. The design kit was developed with <strong>Imagination</strong> <strong>Technologies</strong>, <strong>CEVA</strong> and <strong>VeriSilicon</strong>. Synopsys also introduced a <a href="http://news.synopsys.com/index.php?s=43&amp;item=1132">synthesis-based test technology</a> with up to three times the compression. It also uses fewer pins and higher-frequency on-chip DFT circuitry.</p>
<p>India’s <strong>SilabTech</strong> rolled out its <a href="http://www.mentor.com/company/news/mentor-silatabtech-28nm-high-speed-phys">28nm mixed signal PHY IP</a> for a variety of standard IO interfaces ahead of schedule using <strong>Mentor</strong> <strong>Graphics</strong>’ layout, extraction, verification and DFM analysis tools. The companies also are working together to characterize test chips and to create a certification platform using Mentor’s FPGA and PCB tools.</p>
<p><strong>Cadence</strong> completed its <a href="http://www.cadence.com/cadence/newsroom/press_releases/Pages/pr.aspx?xml=061313_Evatronix&amp;CMP=home">purchase</a> of Poland’s <strong>Evatronix</strong>, which makes IP for USB, MIPI and storage controllers.</p>
<p><strong>Dassault</strong> <strong>Systemes</strong> <a href="http://www.3ds.com/company/news-media/press-releases-detail/release/dassault-systemes-3dexperience-selected-by-pininfarina-to/single/4830/?cHash=daf62e163465074cd79210ab659c0128">won a deal</a> with <strong>Pininfarina</strong>—the company that designs Ferraris, as well as the slick <a href="http://www.pininfarina.it/it/homepage/homepage.htm">new BMW</a>—for its 3D modeling tools.</p>
<p>The market for <a href="http://www.idc.com/getdoc.jsp?containerId=prUS24162413">high-performance computing</a> increased 5.3% in Q1 to $2.5 billion, up from $2.4 billion in the same period in 2012, according to <strong>IDC</strong>. <strong>HP</strong> and <strong>IBM</strong> each had 31.5% of the market.</p>
<p>There was another market tie, this one in <a href="http://www.isuppli.com/MEMS-and-Sensors/News/Pages/It’s-a-Tie-Bosch-and-STM-Hold-Joint-Honors-as-No-1-MEMS-Suppliers-for-2012.aspx">MEMS</a>. <strong>Bosch</strong> and <strong>STMicroelectronics</strong> each reported $793 million in sales last year, according to <strong>IHS</strong> <strong>iSuppli</strong>. <strong>TI</strong> came in next with $751 million, followed by <strong>HP</strong> with $766 million.</p>
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		<title>Blog Review: June 12</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/12/blog-review-june-12/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/12/blog-review-june-12/#comments</comments>
		<pubDate>Wed, 12 Jun 2013 13:18:56 +0000</pubDate>
		<dc:creator>ed</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[Cadence]]></category>
		<category><![CDATA[Jasper Design Automation]]></category>
		<category><![CDATA[Mentor Graphics]]></category>
		<category><![CDATA[MIPI]]></category>
		<category><![CDATA[National Instruments]]></category>
		<category><![CDATA[Real Intent]]></category>
		<category><![CDATA[Samsung Electronics]]></category>
		<category><![CDATA[Synopsys]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=9013</guid>
		<description><![CDATA[DAC connections, George Clooney, compilers, blackmail photos, MIPI, Hawaii, platforms.]]></description>
			<content:encoded><![CDATA[<p>By Ed Sperling<br />
Cadence’s <a href="http://www.cadence.com/Community/blogs/fullerview/archive/2013/06/07/dac-2013-at-50-oh-the-memories.aspx">Brian Fuller</a> takes a look back at DAC’s first half century. So <em>that’s</em> where Kevin and Kathryn Kranen agreed to join forces. Ditto for Gary and Lori Kate Smith. Apparently not everything stays in Vegas—not even DAC. </p>
<p>Synopsys’ <a href="http://blogs.synopsys.com/tousbornottousb/2013/06/05/john-chilton-at-dac-2013/">Eric Huang</a> interviews his VP of marketing, John Chilton, about what young engineers should be focusing on. And what does George Clooney have to do with all of this? You’ll have to watch the video to find out. </p>
<p>Mentor’s <a href="http://www.mentor.com/embedded-software/blog/post/reduce-your-embedded-design-compile-times-with-sourcery-codebench-c5275e04-a637-4b1a-bf87-2a1d4638e256">Anil Khanna</a> digs into the compile cache feature of Sourcery CodeBench, which cuts compile time by as much as half. This is one place where performance really does matter. </p>
<p>Real Intent’s <a href="http://www.realintent.com/real-talk/">Graham Bell</a> has some blackmail photos from DAC. He’s the one hiding in the Uncle Sam hat, in case you’re wondering. </p>
<p>Cadence’s <a href="http://www.cadence.com/Community/blogs/ii/archive/2013/06/06/samsung-dac-2013-keynote-eda-semis-not-well-prepared-for-next-mobile-revolution.aspx">Richard Goering</a> reports on a DAC keynote by Samsung Electronics president Stephen Woo, who said semiconductor makers will face huge challenges in the next five years. The density has increased, but the theme sounds very familiar. Remember 1 micron? </p>
<p>Synopsys’ <a href="http://blogs.synopsys.com/breakingthethreelaws/2013/06/my-dac-2013-impressions/">Mick Posner</a> returned from Hawaii and immediately jumped a plane to Austin for DAC. He’s probably ready to go back to Hawaii. </p>
<p>Mentor’s <a href="http://www.mentor.com/embedded-software/blog/post/device-firmware-upgrade-through-usb-a588a0dd-20c0-4dea-bf7f-9674bac83710">Colin Walls</a> looks at firmware upgrades and how the process has changed. It wasn’t always this easy. </p>
<p>Synopsys’ <a href="http://blogs.synopsys.com/onthemove/2013/06/demonstating-m-phy-v3-0-silicon/">Hezi Saar</a> digs into the MIPI M-PHY v3.0 spec, including a video shot in Bangkok showing the measurements. This should rack up the frequent flier miles. Next meeting: Warsaw, Poland. </p>
<p>Cadence’s <a href="http://www.cadence.com/Community/blogs/fullerview/archive/2013/06/05/ni-ceo-sounds-call-for-platform-based-design-at-dac-2013.aspx">Brian Fuller</a> also covered a speech by National Instruments CEO James Truchard about the need for platform-based design. That must have sounded like a beautiful symphony to IP vendors. </p>
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		<title>System Bits: June 11</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/11/system-bits-june-11/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/11/system-bits-june-11/#comments</comments>
		<pubDate>Tue, 11 Jun 2013 07:01:17 +0000</pubDate>
		<dc:creator>ann</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[2D electronics]]></category>
		<category><![CDATA[Albert Einstein]]></category>
		<category><![CDATA[chemical vapor deposition]]></category>
		<category><![CDATA[entanglement]]></category>
		<category><![CDATA[ETH Zurich]]></category>
		<category><![CDATA[field-effect transistors]]></category>
		<category><![CDATA[flexible optoelectronics]]></category>
		<category><![CDATA[graphene]]></category>
		<category><![CDATA[hexagonal boron nitride]]></category>
		<category><![CDATA[ICs]]></category>
		<category><![CDATA[MDS]]></category>
		<category><![CDATA[molybdenum disulfide]]></category>
		<category><![CDATA[nanoscale sensors]]></category>
		<category><![CDATA[Oak Ridge National Lab]]></category>
		<category><![CDATA[photodetectors]]></category>
		<category><![CDATA[polytopes]]></category>
		<category><![CDATA[quantum mechanics]]></category>
		<category><![CDATA[Rice University]]></category>
		<category><![CDATA[Richard Feynman]]></category>
		<category><![CDATA[Spintronics]]></category>
		<category><![CDATA[spooky action]]></category>
		<category><![CDATA[University of Chicago]]></category>
		<category><![CDATA[University of Freiburg]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=9002</guid>
		<description><![CDATA[Atom-thick circuits; entanglement; spintronics.
]]></description>
			<content:encoded><![CDATA[<p><strong>2D electronics </strong><strong>advance</strong><br />
Scientists at Rice University and Oak Ridge National Laboratory (ORNL) have advanced on the goal of 2D electronics with a method to control the growth of uniform atomic layers of <a href="http://news.rice.edu/2013/06/10/2-d-electronics-take-a-step-forward/" target="_blank">molybdenum disulfide (MDS)</a>.</p>
<p>MDS is a semiconductor and is one of a trilogy of materials needed to make functioning 2D electronic components expected to someday possibly be the basis for the manufacture of devices so small they would be invisible to the naked eye.</p>
<p>The research goals included determining if large, high-quality, atomically thin MDS sheets could be grown in a chemical vapor deposition (CVD) furnace and to analyze their characteristics. The hope is that MDS could be joined with graphene, which has no band gap, and hexagonal boron nitride (hBN), an insulator, to form field-effect transistors, integrated logic circuits, photodetectors and flexible optoelectronics.</p>
<p>For truly atomic circuitry, this is important and if they can get this material to work, then the researchers said they will have a set of materials to play with for complete, complicated devices.</p>
<p>Last year, Rice researchers revealed their success at making <a href="http://news.rice.edu/2013/01/28/rice-technique-points-toward-2-d-devices-2/">intricate patterns of intertwining graphene and hBN</a>, but there was still a piece missing for the materials to be full partners in advanced electronic applications. By then, the researchers were already well into their study of MDS as a semiconducting solution.</p>
<p>While 2D materials have taken off, the question now is how to bring all the 2D materials together as they are very different species and they’re being grown in very different environments.</p>
<p>Until recently, growing MDS in a usable form was been difficult. The <a href="http://www.independent.co.uk/news/science/the-graphene-story-how-andrei-geim-and-kostya-novoselov-hit-on-a-scientific-breakthrough-that-changed-the-world-by-playing-with-sticky-tape-8539743.html">“Scotch tape”</a> method of pulling layers from a bulk sample has been tried, but the resulting materials were inconsistent. Early CVD experiments produced MDS with grains that were too tiny to be of use for their electrical properties.</p>
<p>In order to improve the properties of 2D materials, it was important to first understand how they’re put together at a fundamental scale. The microscopy facility at ORNL allows the researchers to see materials in a way they’ve never been seen before — down to the level of individual atoms.</p>
<div id="attachment_9003" class="wp-caption alignnone" style="width: 281px"><a href="http://chipdesignmag.com/sld/files/2013/06/rice-june11.jpg"><img class="size-medium wp-image-9003" src="http://chipdesignmag.com/sld/files/2013/06/rice-june11-271x300.jpg" alt="" width="271" height="300" /></a><p class="wp-caption-text">Schematics and experimental images produced by Oak Ridge National Laboratory show defects at the 60-degree grain boundaries in two-dimensional samples of molybdenum disulfide. The defects are 5- and 7-atom dislocation cores; the numbers refer to locations where the atomic arrangements veer from regular six-atom hexagons. Their presence indicates a one-dimensional conductive “wire” that runs along the boundary. In the illustration, the molybdenum atoms are cyan and the sulfur atoms are orange and yellow. (Source: Oak Ridge National Laboratory)</p></div>
<p>With ORNL’s images in hand, the researchers were not only able to calculate the energies of a much more complex set of defects than are found in graphene or BN but could also match their numbers to the images.</p>
<p><strong>Entangling quantum mechanics</strong><br />
A property known as ‘<a href="http://www.ethlife.ethz.ch/archive_articles/130607_verschraenkungszustaende_at/index_EN" target="_blank">entanglement</a>’ is a fundamental characteristic of quantum mechanics. Physicists and mathematicians at ETH Zurich show how different forms of this phenomenon can be efficiently and systematically classified into categories, which should help to fully exploit the potential of novel quantum technologies.</p>
<p>American physicist Richard Feynman, spoke the words: “I think I can safely say that nobody understands quantum mechanics,” thus underlining the fact that even leading scientists struggle to develop an intuitive feeling for quantum mechanics. One reason for this is that quantum phenomena often have no counterpart in classical physics. A typical example is the quantum entanglement: Entangled particles seem to directly influence one another, no matter how widely separated they are. It looks as if the particles can communicate with one another across arbitrary distances. Albert Einstein famously called this seemingly paradoxical behavior, “spooky action at a distance.”</p>
<p>When more than two particles are entangled, the mutual influence between them can come in different forms. These different manifestations of the entanglement phenomenon are not fully understood, and so far there exists no general method to systematically group entangled states into categories.</p>
<p>Researchers at ETH Zurich’s Institute for Theoretical Physics provide an important contribution towards putting the ‘spooky action’ to order. The team has developed a method that allows them to assigning a given quantum state to a class of possible entanglement states. Such a method is important because, among other things, it helps to predict how potentially useful the quantum state can be in technological applications.</p>
<p>ETH Zurich reserachers worked with others from the University of Freiburg in Germany to introduce a method in which different classes of entangled states are associated with geometric objects known as polytopes. These objects represent the space that is available to the states of a particular entanglement class. Whether or not a given state belongs to a specific polytope can be determined by making a number of measurements on the individual particles. Importantly, there is no need to measure several particles simultaneously, as is necessary in other methods. The possibility to characterize entangled states through measurements on individual particles makes the new approach efficient, and means also that it can be extended to systems with several particles.</p>
<div id="attachment_9004" class="wp-caption alignnone" style="width: 240px"><a href="http://chipdesignmag.com/sld/files/2013/06/eth-june11.jpg"><img class="size-full wp-image-9004" src="http://chipdesignmag.com/sld/files/2013/06/eth-june11.jpg" alt="" width="230" height="172" /></a><p class="wp-caption-text">Researchers at ETH Zurich have developed a method of assigning classes of complex quantum states to geometric objects known as polytopes. (Source:  ETH Zurich)</p></div>
<p>Quantum systems with several particles are of interest because they could take an important role in future technologies. In recent years, scientists have proposed, and partly implemented, a wide variety of applications that use quantum-mechanical properties to do things that are outright impossible in the framework of classical physics. These applications range from the tap-proof transmission of messages, to efficient algorithms for solving computational problems, to techniques that improve the resolution of photolithographic methods. In these applications, entangled states are an essential resource, precisely because they embody a fundamental quantum-mechanical phenomenon with no counterpart in classical physics. When suitably used, these complex states can open up avenues to novel applications.</p>
<p><strong>Spintronics applied to quantum technologies</strong><br />
A team of researchers, including members of the University of Chicago’s Institute for Molecular Engineering, highlight the power of emerging quantum technologies in two recent papers published in the <em>Proceedings of the National Academy of Sciences</em>. These technologies exploit <a href="http://news.uchicago.edu/article/2013/06/04/spintronics-approach-enables-new-quantum-technologies" target="_blank">quantum mechanics</a>, the physics that dominates the atomic world, to perform disparate tasks such as nanoscale temperature measurement and processing quantum information with lasers.</p>
<p>The two papers are both based on the manipulation of the same material, an atomic-scale defect in diamond known as the nitrogen vacancy center. Both works also leverage the intrinsic “spin” of this defect for the applications in temperature measurement and information processing. This spintronics approach involves understanding and manipulating the spin of electronics for technological advancement.</p>
<p>These studies build on research efforts undertaken over the last 20 years to isolate and control single electronic spins in the solid state with much of the initial motivation for working in this field driven by the desire to make new computing technologies based on the principles of quantum physics. In recent years the research focus has broadened as researchers have come to appreciate that these same principles could enable a new generation of nanoscale sensors.</p>
<div id="attachment_9005" class="wp-caption alignnone" style="width: 290px"><a href="http://chipdesignmag.com/sld/files/2013/06/uchicago-june11.jpg"><img class="size-full wp-image-9005" src="http://chipdesignmag.com/sld/files/2013/06/uchicago-june11.jpg" alt="" width="280" height="296" /></a><p class="wp-caption-text">This artist’s rendering shows all-optical control of an individual electronic spin within a diamond. This spin is associated with a naturally occurring defect in diamond known as the nitrogen-vacancy center, a promising quantum bit (qubit) for quantum information processing. The University of Chicago’s David Awschalom and his associates have developed techniques to initialize, manipulate, and read out the electronic spin of this qubit using only pulses of light. (Source: The University of Chicago)</p></div>
<p><em>~Ann Steffora Mutschler</em></p>
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		<title>The Week In Review: June 7</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/07/the-week-in-review-june-7/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/07/the-week-in-review-june-7/#comments</comments>
		<pubDate>Fri, 07 Jun 2013 15:21:28 +0000</pubDate>
		<dc:creator>ed</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[14nm]]></category>
		<category><![CDATA[16nm]]></category>
		<category><![CDATA[Ansys]]></category>
		<category><![CDATA[Apache Design]]></category>
		<category><![CDATA[ARM]]></category>
		<category><![CDATA[Arteris]]></category>
		<category><![CDATA[Atrenta]]></category>
		<category><![CDATA[big.LITTLE]]></category>
		<category><![CDATA[DAC]]></category>
		<category><![CDATA[Duolog Technologies]]></category>
		<category><![CDATA[finFETS]]></category>
		<category><![CDATA[Jasper Design Automation]]></category>
		<category><![CDATA[Mentor Graphics]]></category>
		<category><![CDATA[NoC]]></category>
		<category><![CDATA[Samsung]]></category>
		<category><![CDATA[Synopsys]]></category>
		<category><![CDATA[TSMC]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=8986</guid>
		<description><![CDATA[DAC; Mentor adds cache-coherent interconnect verification; Synopsys adds field solvers for Samsung 14nm process; TSMC certifies Apache tools for 16nm; Atrenta rolls out new capabilities; Jasper teams with Duolog for SoC integration and verification.]]></description>
			<content:encoded><![CDATA[<p>By Ed Sperling<br />
For all the hesitation about moving the Design Automation Conference to Austin, it turns out that Austin has a lot of hardware engineers. In fact they flooded into the conference, turning it into one of the most successful in recent years and setting new records in multiple areas. Even Texas Gov. Rick Perry showed up to see what all the fuss was about.</p>
<p><strong>Mentor</strong> <strong>Graphics</strong> added <a href="http://www.mentor.com/company/news/mentor-questa-veloce-arm">cache-coherent interconnect verification</a> into its existing verification and emulation platforms, a move that positions it to handle multi-core chips such as big.LITTLE implementations of <strong>ARM</strong> cores. The platforms will support ARM’s AMBA 5 CHI and AMBA 4 ACE specifications. Mentor also <a href="http://www.mentor.com/company/news/mentor-calibre-dfm-freescale">won a deal</a> with Freescale for its test, physical verification, yield analysis and DFM tools.</p>
<p><strong>Synopsys</strong> rolled out a design implementation solution for Samsung’s 14nm finFET process, including <a href="http://news.synopsys.com/index.php?s=43&amp;item=1131">field-solver technology</a> to model the parasitics of 3D transistors, high-performance models and support for physical implementation rules.</p>
<p><strong>TSMC</strong> certified <strong>Apache Design</strong>’s <a href="http://www.apache-da.com/company/news/press-releases/details/4421">power integrity and electromigration verification tools</a> for 16nm finFETs for version 0.1 of the design reference manual and SPICE model. EM is one of the major concerns among EDA vendors for 3D transistors at the latest process nodes.</p>
<p><strong>Atrenta</strong> uncorked version 5.1 of its <a href="http://www.atrenta.com/atrenta-news/159.news">verification and design exploration tools</a>, including a new GUI with expanded space for debug, message grouping and filtering, as well as the ability to trace signal drivers across different hierarchies.</p>
<p><strong>Jasper</strong> teamed up with Ireland’s <strong>Duolog Technologies</strong> to <a href="http://www.jasper-da.com/press-releases/jasper-and-duolog-partner-combine-soc-integration-formal-verification">combine Duolog’s SoC integration tools with Jasper’s formal technology</a>. The duo initially will deliver two flows, one for capture and verification of registration metadata, and the second to assemble, construct and verify SoC integration, including temporal and conditional connections and multiplexed I/O connections. Jasper also added <a href="http://lp-hp.com/blog/2013/06/05/the-power-of-dac/">power awareness to its formal verification tools</a>, allowing RTL to be infused with power structure sequences, buffers to be inserted and then assertions to be extracted to verify the power sequencing is correct.</p>
<p><strong>Arteris</strong> said its <a href="http://www.arteris.com/Arteris_mobility_pr_4_june_2013">NoC IP was used in 60% of application processors and LTE modems</a> developed in 2011 and 2012 for smart phones and tablets—the majority of mobile SoCs. Considering the growing use of third-party IP and time-to market pressures, there’s probably good reason why that market is seeing a surge.</p>
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		<title>Blog Review: June 5</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/05/blog-review-june-5/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/05/blog-review-june-5/#comments</comments>
		<pubDate>Wed, 05 Jun 2013 10:51:09 +0000</pubDate>
		<dc:creator>ed</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[Arteris]]></category>
		<category><![CDATA[Cadence]]></category>
		<category><![CDATA[Mentor Graphics]]></category>
		<category><![CDATA[Real Intent]]></category>
		<category><![CDATA[Sonics]]></category>
		<category><![CDATA[Synopsys]]></category>
		<category><![CDATA[Trilobe]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=8979</guid>
		<description><![CDATA[CEO job description, visionary investing, pitfalls, software-driven EDA, things, cores, smart IP subsystems.]]></description>
			<content:encoded><![CDATA[<p>By Ed Sperling<br />
Synopsys&#8217; <a href="http://blogs.synopsys.com/tousbornottousb/2013/06/04/aart-eric-at-dac-2013/">Eric Huang</a> asks co-CEO Aart de Geus what he actually does at the company in this video interview. The answer is quite funny.</p>
<p>Cadence&#8217;s <a href="http://www.cadence.com/Community/blogs/fullerview/archive/2013/06/04/dac-2013-cadence-s-tan-doubling-tripling-down-on-semiconductor-investment.aspx?CMP=home">Brian Fuller</a> captures a DAC &#8220;visionary series&#8221; speech by CEO Lip-Bu Tan on the next big wave, and where he&#8217;s putting his investments: Wearable, drivable, flyable and scannable technologies.</p>
<p>Mentor&#8217;s <a href="http://www.mentor.com/embedded-software/blog/post/non-intrusive-debug-e7c9277e-20ea-4c0f-a0de-35c44a35e728">Colin Walls</a> looks at the pitfalls of embedded software debugging approaches and why they&#8217;re no longer a problem: New tools.</p>
<p>Cadence&#8217;s <a href="http://www.cadence.com/Community/blogs/ii/archive/2013/06/04/freescale-ceo-at-dac-2013-internet-of-things-brings-opportunities-challenges.aspx?CMP=home">Richard Goering</a> recounts a DAC speech by Freescale CEO Gregg Lowe about the Internet of Things and where the opportunities, challenges and pitfalls will be.</p>
<p>And in case you missed the most recent issue of the <a href="http://chipdesignmag.com/sld/wp-content/newsletter/2013/05"><em>System-Level Design</em></a> newsletter, here are some noteworthy blogs:</p>
<p>- Synopsys&#8217; <a href="http://chipdesignmag.com/sld/viewfromthetop/2013/05/30/software-from-zero-to-hero/">Tom De Schutter</a> observes that if you&#8217;re looking at software as a necessary evil, you&#8217;re missing a huge opportunity.</p>
<p>- Cadence&#8217;s <a href="http://chipdesignmag.com/sld/schirrmeister/2013/05/21/software-driven-electronic-design-automation/">Frank Schirrmeister</a> digs into software-driven EDA and just how far the industry has come.</p>
<p>- Sonics&#8217; <a href="http://chipdesignmag.com/sld/ferro/2013/05/30/multicore-is-more-better/">Frank Ferro</a> questions whether two cores are better than one, and what multicore really means.</p>
<p>- Arteris&#8217; <a href="http://chipdesignmag.com/sld/shuler/2013/05/30/just-add-ip/">Kurt Shuler</a> notes that the best way to solve the problem of too much IP is with more IP.</p>
<p>- Real Intent&#8217;s <a href="http://chipdesignmag.com/sld/realintent/2013/05/30/does-soc-signoff-mean-more-than-rtl/">Graham Bell</a> asks whether SoC signoff includes more than RTL.</p>
<p>- And Trilobe&#8217;s <a href="http://chipdesignmag.com/sld/hand/2013/05/30/the-revolution-of-intelligent-ip-subsystems/">Neil Hand</a> examines whether intelligent IP subsystems are evolutionary or revolutionary—or maybe both.</p>
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		<title>DAC, Day One</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/04/dac-day-one/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/04/dac-day-one/#comments</comments>
		<pubDate>Tue, 04 Jun 2013 11:41:38 +0000</pubDate>
		<dc:creator>ed</dc:creator>
				<category><![CDATA[News Stories]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=8974</guid>
		<description><![CDATA[Reporter's Notebook: This must be Texas.]]></description>
			<content:encoded><![CDATA[<p>By Ed Sperling<br />
Given the number of celebrations on the show floor, and the number of people in attendance, there may have been some hidden wisdom in running DAC in Austin.</p>
<p>That&#8217;s not totally surprising, though. The number of chips designed and manufactured in Texas is higher than on the West Coast, where most of the EDA companies are located. In fact, when you consider that Samsung, Intel, IBM, Freescale, Texas Instruments, National Instruments all have significant, if not total, presence in and around Austin, there&#8217;s probably a case to be made for a local show every few years,</p>
<p>Attendance remained high throughout the day, too, as registrants—in this case, they were paid attendees—filled conference rooms.</p>
<p>Also interesting this year were the number of top executives who stuck around for more than just the first day. CEOs, CTOs and the industry&#8217;s top minds mingled everywhere. If you had a question about EDA, it could be answered here. If you had a question about manufacturing, that could be answered here, too. GlobalFoundries, Samsung, IBM, TSMC and Intel were all out in force, either in sessions or in booths.</p>
<p>And then there were bits of wisdom that seemed to come out of nowhere, like a customer quote delivered by one of the industry&#8217;s verification luminaries: &#8220;When you design a system, if there is more than 30% new IP, you&#8217;ve done too much.&#8221;</p>
<p>The question is whether even that number is too high, given the rising challenge of verification, debug and integration.</p>
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		<title>System Bits: June 4</title>
		<link>http://chipdesignmag.com/sld/blog/2013/06/04/system-bits-june-4/</link>
		<comments>http://chipdesignmag.com/sld/blog/2013/06/04/system-bits-june-4/#comments</comments>
		<pubDate>Tue, 04 Jun 2013 07:01:39 +0000</pubDate>
		<dc:creator>ann</dc:creator>
				<category><![CDATA[News Stories]]></category>
		<category><![CDATA[diamonds]]></category>
		<category><![CDATA[graphene]]></category>
		<category><![CDATA[Honda Research Institute]]></category>
		<category><![CDATA[iron-platinum alloy]]></category>
		<category><![CDATA[nanomagnets]]></category>
		<category><![CDATA[Nanotubes]]></category>
		<category><![CDATA[Rice University]]></category>
		<category><![CDATA[tunable magnetic properties]]></category>
		<category><![CDATA[University of California at Davis]]></category>

		<guid isPermaLink="false">http://chipdesignmag.com/sld/?p=8977</guid>
		<description><![CDATA[Next-gen hard drives; diamonds and nanotubes.]]></description>
			<content:encoded><![CDATA[<p><strong>Iron-platinum alloys could be new-generation hard drives</strong><br />
Meeting the demand for more data storage in smaller volumes means using materials made up of ever-smaller magnets, or nanomagnets. One promising material for a potential new generation of recording media is an alloy of iron and platinum with an ordered crystal structure. Researchers at the University of California, Davis, have now found a convenient way to make these <a href="http://news.ucdavis.edu/search/news_detail.lasso?id=10603" target="_blank">alloys</a> and tailor their properties.</p>
<p>The relatively convenient synthesis conditions, along with the tunable magnetic properties, make these materials highly desirable for future magnetic recording technologies, the researchers said. The iron-platinum alloy has the ability to retain information even at extremely small nanomagnet sizes, and it is resistant to heat effects.</p>
<p>Previous methods for making the iron-platinum alloys with an ordered crystal structure involved high-temperature treatments that would be difficult to integrate into the rest of the manufacturing process.</p>
<p>The researchers used a method called atomic-scale multilayer sputtering to create a material with extremely thin layers of metal and rapid thermal annealing to convert it into the desirable ordered alloy. They were able to adjust the magnetic properties of the alloy by adding small amounts of copper into particular regions of the alloy.</p>
<p><strong>Diamonds, nanotubes find common ground in graphene</strong><br />
What may be <a href="http://news.rice.edu/2013/05/28/diamonds-nanotubes-find-common-ground-in-graphene/" target="_blank">the ultimate heat sink</a> is only possible because of yet another astounding capability of graphene. The one-atom-thick form of carbon can act as a go-between that allows vertically aligned carbon nanotubes to grow on nearly anything…and that includes diamonds, according to researchers at Rice University and the Honda Research Institute USA who have created a diamond film/graphene/nanotube structure.</p>
<p>The heart of the research is the revelation that when graphene is used as a middleman, surfaces considered unusable as substrates for carbon nanotube growth now have the potential to do so. Diamond happens to be a good example, according to Rice and Honda scientists.</p>
<p>Diamond conducts heat very well, five times better than copper. But its available surface area is very low. By its very nature, one-atom-thick graphene is all surface area. The same could be said of carbon nanotubes, which are basically rolled-up tubes of graphene. A vertically aligned forest of carbon nanotubes grown on diamond would disperse heat like a traditional heat sink, but with millions of fins. Such an ultrathin array could save space in small microprocessor-based devices.</p>
<p>The researchers believe further work along these lines could produce such structures as patterned nanotube arrays on diamond that could be utilized in electronic devices. Graphene and metallic nanotubes are also highly conductive; in combination with metallic substrates, they may also have uses in advanced electronics.</p>
<p><em>~Ann Steffora Mutschler</em></p>
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