http://chipdesignmag.com/sld/mcdonald/2009/11/19/an-esl-measurement-epiphany/ Deep Insights for Chip Architects and Engineers Wed, 02 May 2012 16:48:20 +0000 hourly 1 http://wordpress.org/?v=3.0.4 http://chipdesignmag.com/sld/mcdonald/2009/11/19/an-esl-measurement-epiphany/comment-page-1/#comment-33 Steve Brown Fri, 18 Dec 2009 00:20:38 +0000 http://chipdesignmag.com/sld/mcdonald/?p=59#comment-33 What seems to be most valuable to customers right now is a more efficient/productive way to create RTL models, and to reuse the IP more readily. Cadence' TLM design and verification solution provides that productivity boost so that more time/engineer bandwidth can be spent using innovative approaches, or simple ones like trying a few architectures and measuring. What seems to be most valuable to customers right now is a more efficient/productive way to create RTL models, and to reuse the IP more readily. Cadence’ TLM design and verification solution provides that productivity boost so that more time/engineer bandwidth can be spent using innovative approaches, or simple ones like trying a few architectures and measuring.

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