Part of the  

Chip Design Magazine

  Network

About  |  Contact

Uncategorized Archive

Blog Review – Dec 02

When everyone hits the shops, some bloggers want to see presents fall from the sky. This week there is also a sleek design project, new uses for SoCs, an Arduino project (with video) a hypervisor discussion and a summit review.

Improved Power Management With Sonics’ ICE-Grain

Hardware controlled power management is more efficient than CPU-based techniques.

The Car as an IoT Node: What are the Design Implications?

The intelligent car should be considered a node on the Internet of Things (IoT).

IoT, Definition, Standards, and Security

A discussion about IoT definition, need for standards, and security.

Focus on France in Nuremberg

Although the venue was the German city of Nuremberg, there was a distinctive coterie of French companies at Embedded World, writes Caroline Hayes, senior editor.

Using Physically Aware Synthesis Techniques to Speed Design Closure of Advanced-Node SoCs

Physically aware synthesis techniques that can help accelerate the physical design closure process for high-performance, power-sensitive SoCs at 28nm and below.

DVCon Highlights: Software, Complexity, and Moore’s Law

Aart de Geus keynote and the Art or Science Panel prove that DVCon is not just for verification engineers.

Blog Review – Tuesday March 10, 2015

Arduino beyond LAN; SoC secrets; NXP and Freescale; Connectivity at Mobile World Congress; Embedded Scandinavia; PCI Express verification, and more

Blog Review – Monday, February 23, 2015

Ready for Embedded World?; Cadence celebrates new computer architecture; Wristwatch aid; What’s in a gate count; Delving into dark silicon

A Prototyping with FPGA Approach

In general, the industry is experiencing the need for what now has been started being called the “shift left” in the design flow. From a chip perspective, about 60% into a project three main issues have to be resolved.