Comments for ESL Edge

Comment on Smarter Design Strategies by MikeB

MikeB — Wed, 02 May 2012 16:48:20 +0000

Indeed, adding an accelerator block to the system may make the worst case power terrible when the block is activated. But it reduces overall power as it runs for a short time, instead of the CPU/software running for a longer time.

Comment on Smarter Design Strategies by Shashi Bhutada

Shashi Bhutada — Sun, 29 Apr 2012 19:38:09 +0000

Here’s another thought: For years the RTL design paradigm has been to write VHDL/Verilog to produce a certain type of hardware or mostly to direct synthesis. The expert designer/architect had a pre-notion of what the final hardware needs to look like and guided the synthesis accordingly using RTL methods. In that case the worst-case analysis might work because one can look at the data sheet and plan for the worst. But is this mode of operation feasible given today’s complexity in chips/systems? Obviously, it is still working. Are the designers being over-compensating for the power demands given the worst case situation? I think RTL paradigm was to direct synthesis to generate certain hardware but ESL paradigm is to rely on now-mature synthesis tools to generate a certain system and iteratively quantify power requirements per block among other things.

Comment on Smarter Design Strategies by Shashi Bhutada

Shashi Bhutada — Sun, 29 Apr 2012 16:05:58 +0000

It’s risky to just plan around worst-case characteristics without quantifying it. It’s better to optimize for different unforeseen events (one of which may be power requirements) via architectural exploration, which allows design exploration and external environment exploration, and both may combine in complex ways to create unforseen events. System modeling allows quantifying worst-case scenarios and best-case scenarios ultimately leading to optimum planning for most plausible mode of usage cases. Let’s not forget other benefits such as early software development, reuse for verification, and virtual prototyping.

Comment on ESL And FPGAs by Andrea

Andrea — Fri, 27 May 2011 08:05:12 +0000

Hi Jon,
I share your point of view that ESL is there to determine the WHAT and the HOW through a higher level of abstraction (and to anticipate developments WHEN possible) but at the same time I also see the strong complementarity of virtual and hardware prototyping, in particular for IO IPs (ex. cameras/displays/etc) and for IPs for which no Virtual model exists but just an RTL version …
Unfortunately, the theoretical Top-Down flow usually used in ESL discussions is really a theoretical one … i.e. the HOW is often an evolution of a previous architecture …
Kind regards,
Andrea

Comment on ESL’s Effect On What Engineers Assume by Gaurav Jalan

Gaurav Jalan — Thu, 28 Oct 2010 07:52:33 +0000

Wrong assumptions are costly and if it is an SOC @ 32nm or below it could cost $100 mn… costlier than one can assume

Comment on The Tide Is Turning by Clifton Cordes

Clifton Cordes — Wed, 30 Jun 2010 16:43:49 +0000

Jon,
I’m drowning in acronyms. Acronymfinder(dot)com has about 282 definitions for ESL and a lot of them are transistor or at least electronic related. Some of your readers study more subjects then just chip layout software. May I suggest you toss in the English version at least once in an article.
In this multi-language technical world I think it’s okay and maybe even important to over-communicate. Thanks for reading.
Cliff

Comment on Why Your iPhone Battery Doesn’t Last by Jon McDonald

Jon McDonald — Tue, 18 May 2010 17:12:40 +0000

Stephane, I believe you bring a good perspective. The traditional approach has been spreadsheet based to address high level power estimation. The challenge is that this approach is not capable of responding to the dynamic requirements placed on the system, based on changing workloads. In ESL we want to create a model that represents the power and performance associated with doing the work the system must perform, this model can then respond to and predict the power and performance based on the dynamic activity required. On our web site we have a paper detailing the approach we are using to address this problem. You can find this paper at http://www.mentor.com/products/esl/techpubs/predicting-and-optimizing-power-at-the-electronic-system-level-57057.

Comment on Why Your iPhone Battery Doesn’t Last by Stephane

Stephane — Thu, 06 May 2010 21:07:17 +0000

I deal with ASIC design in my company. We have similar concerns, but Excel spreadsheet and differential solvers are more than sufficient for high-level power estimation. I still don’t understand how ESL/TLM can provide better accuracy. From experience, you need at least cycle-accurate models to get some meaningful insights. Anything more abstract is too vague. More details would be helpful but I couldn’t find on Mentor website.

Comment on Why Your iPhone Battery Doesn’t Last by JW

JW — Thu, 29 Apr 2010 18:05:42 +0000

I have found that WiFi seems to drain the battery more quickly than bluetooth.

At home, if I have bluetooth off and WiFi on, the battery drains in 4 to 6 hours (subjective). Whereas, with WiFi off and bluetooth on, it will last through the day and into the evening.

On the wifi side, I have the SSID hidden. I have not done any tests to seek if this affects the WiFi battery consumption.

Comment on Why Your iPhone Battery Doesn’t Last by Allen

Allen — Wed, 28 Apr 2010 17:50:38 +0000

Apple may think it is good enough; it may be good enough for some, but it is not good enough for me. That’s why I and many others are seriously considering iphone alternatives when our contracts run out.