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Archive for October, 2014

The Lanza’s Challenge

Wednesday, October 22nd, 2014

It is always a pleasure to talk to Dr. Lucio Lanza and I took the opportunity of being in Silicon Valley to interview Lucio since he has just been awarded the 2014 Phil Kaufman award.  We met in his office in Palo Alto and broke the ice by addressing a common topic: Cruising.  Both Lucio and I love cruising and he reminisced about what he says is his most adventurous cruise.  He took a voyage to the North Pole on a Russian icebreaker!  Not only that, but he went for a group swim in the water cleared in the wake of the ship while two ship doctors were in attendance.  OK he won this encounter, since my cruising is quite mundane in comparison..

Lucio’s first visit to Silicon Valley was in 1975 and he moved here permanently in October 1977.  Finally I can best this.  My first visit was in 1970 and I moved to the valley in January 1976.  In both cases, though my “achievements” fall short of a Kaufman.  It was fun to remember the days when orchards were the most abundant feature in the Valley.  Dr. Lanza noted that when the Valley got its name it was truly a silicon valley.  Now the foundries have gone and silicon remains as the underlying structure of all that goes on in the Valley.  Silicon, said Lucio is like lava flowing underneath.  Eventually it turns to fertile soil from which new ventures are born.

Talking about semiconductor manufacturing Lucio pointed out that what is generally called Moore’s Law should instead be called Moore’s Challenge.  Everyone concedes that it is not a law, but no one until this conversation gave me an alternative label and an explanation to go with it.  It is a challenge because it dares the industry to keep costs per transistor fundamentally constant.  Without such development, costs of a chip would grow exponentially and progress would in consequence slow down.

As our attention turned to EDA, Lucio observed a parallel effect to Moore’slaw.  No one, until this conversation has even attempted to describe to me the impact of EDA to not only the electronics industry but to progress in general in this way.  According to Lucio the role of EDA is to keep the cost of design as flat as possible.  So here is the Lanza’s Challenge:  The capability of EDA tools will grow in relation to design complexity so that cost of design will remain constant relative to the number of transistors on a die.

We both agree, by the way, that the effort of some IP companies to distance themselves from EDA is wrong.  IP is part of EDA, an integral part in fact in enabling the development of complex designs without the increase in cost that would otherwise happen.  What other explanation would one give to the fact that all big three EDA companies sell and develop IP?  IP is contributing to extend the reach of EDA.

Soon, said Lucio, a processor will be considered nothing more that a gate many years ago.  Systems will contain hundreds, thousand, ten of thousands processors.  When that happens, EDA will be ready to support the design and development of such products.  We may not know in details all the tools required, but we know that we have the creativity to plan and develop them.

Today SoC does not exist: what exists is HoC (Hardware on Chip), SoC is still to happen.  When we really learn to design and manufacture a complex system with hundred of processors that changes a machine from a computing machine to one that can analyze a problem in an exhausted manner.  When that happens the role of man will change from analyzing to judging. When that will happen efficiency will go up exponentially.  The computer role will be not that to make the operations of the company more efficient, but to make the business of the company more efficient.

EDA is neither dead nor dying because Lanza’s Challenge is enduring.

The Divorce That Never Happened

Monday, October 6th, 2014

Gabe Moretti, Senior Editor

Last week ARM and Synopsys jointly announced a new agreement that allows Synopsys an early access to a wide range of ARM product families in order to tune the Synopsys tools to the requirements engineers will face when developing systems containing those IP cores.

The multi-year subscription agreement expands Synopsys’ access to a broad range of ARM intellectual property (IP) and related technologies to enable optimization of Synopsys tools and methodologies for ARM-based system-on-chips (SoCs). Through this agreement, Synopsys has pre-production access to ARM Cortex processors for the ARMv8-A and ARMv7-A architectures, ARM Mali graphics processors, ARM CoreLink system IP, ARM Artisan physical IP, and ARM POP IP for implementation acceleration. Building on more than 20 years of collaboration as well as the August 2012 license agreement between the companies for ARMv7-A processors and related IP, this new agreement allows Synopsys to further optimize its design flows and tools for ARM-based SoCs, enabling designers to meet their power, performance and area goals, while reducing cost and time-to-market.

It was only four years ago that the rumor was that following Synopsys acquisition of Virage Logic and its ARC family of processors there would not be any more room for ARM and Synopsys to work together.   I was told that Cadence would replace Synopsys as the preferred EDA vendor at ARM.  I was instructed on the short sighted move Synopsys had made by entering the MCU market with a family of products that had never been competitive in the market.  And I was told that Synopsys would have to scrap the ARC family of products and eat humble pie in order to ever see another dollar from ARM.

At the time I had very few ammunitions to combat those positions.  But I knew Synopsys and I was sure that some significant due diligence had been done before expanding there presence in the design for test market with established IP products.   And it did not make sense to me that Synopsys would let an “accident” spoil its relationship with ARM.  The result was that I did not join the ranks of those prophesying imminent ruin for Synopsys,

Or even an open marketing war between ARM and Synopsys.  I did not, to be fair, also not openly contest those rumors, coming as they were, from individuals who are frequently, “in the know”.

If there ever were dirty linens involved, they were cleaned privately: after all ARM knew where ARC processors fit in the market, and had never spent much effort in defending its market from Virage Logic.  So during all the ensuing years relationships between ARM and Synopsys have continued to be positive, and, just in time for ARM TechCon we are given the strongest possible assurance that the two companies are making money together by leveraging each other’s technology.

The multi-year subscription agreement  expands Synopsys’ access to a broad range of ARM intellectual property (IP) and related technologies to enable optimization of Synopsys tools and methodologies for ARM-based system-on-chips (SoCs). Through this agreement, Synopsys has pre-production access to ARM Cortex processors for the ARMv8-A and ARMv7-A architectures, ARM Mali graphics processors, ARM CoreLink system IP, ARM Artisan physical IP, and ARM POP IP for implementation acceleration. Building on more than 20 years of collaboration as well as the August 2012 license agreement between the companies for ARMv7-A processors and related IP, this new agreement allows Synopsys to further optimize its design flows and tools for ARM-based SoCs, enabling designers to meet their power, performance and area goals, while reducing cost and time-to-market.