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Archive for October, 2008

Keeping the “E” in ESL

Thursday, October 23rd, 2008

I was in Boston last week and I met with a few customers who shared information about their activities around ESL.  I’m always pleased to meet with customers who are already down the path of ESL. However, I’m often surprised to hear what constitutes ESL for them. In this case, the customer was creating very high level, conceptual models of a system, also known as model based design, to represent a wide range of engineering disciplines across the system (HW, SW, Thermal, Optical). I noted that the models had no representation of actual hardware, just functions in concept which may or may not ever be in actual hardware.

The next night, I was in Philadelphia, at a renowned cheesesteak sub shop, where I watched the Phillies clobber the Dodgers, all the while raising my cholesterol with a great sub. Earlier in the day, I met with another customer who said they were interested in applying ESL and were planning to start by creating UML models. In less than 24 hours, I had met with two customers with completely different concepts of ESL.  Interestingly, neither concept–the model-based design or the UML modeling activity–really fit within my definition of ESL. Specifically, both methodologies neglected the “E” in ESL.  The E in ESL implies electronic hardware and some representation of that implementation. 

While ESL is certainly a design representation above RTL, that doesn’t mean it encompasses every abstraction above RTL. ESL starts and stops within the abstraction of TLM (transaction level modeling), which includes some representation of hardware architecture.  While there are certainly benefits and good reasons to also do conceptual modeling, above ESL, lumping those methodologies into the  ESL bucket dilutes the space and risks confusion in the market.   ESL is a major step in hardware design methodology above RTL and a logical progression in hardware design methodology.  Given the long history of ESL, as we watch it come of age, it seems like a good idea to maintain clarity as to what is and is not within this design methodology.

The Promise of TLM 2.0 – Exploring New Horizons

Wednesday, October 1st, 2008

The recently announced SystemC Transaction-level Modeling Standard, TLM 2.0, by the Open SystemC Initiative (OSCI) holds a great deal of promise for the electronic design community.  This standard has been long anticipated and we, in the electronic system-level (ESL) arena, have been eagerly awaiting the arrival of this new interoperability standard that will enable SoC developers to create and design with more efficiency.

For those of you unfamiliar with the TLM 2.0 Modeling Standard, this solution provides SystemC model interoperability and reuse at the transaction level, resulting in an ESL “framework” to analyze system architecture, in the context of hardware and software, performing performance analysis, and system verification.  As an industry standard, TLM 2.0 is language- independent, meaning that users can integrate models from a variety of different sources easily—thus enabling more efficient simulation performance.  This new standard interface promises to help speed the integration of tools and models used in verification platforms for hardware and software co-design, a real plus for today’s advanced designs. 

TLM 2.0 provides robust virtual platform capabilities; direct memory interfaces (DMI) enable faster virtual platform execution speed for software development by providing  “backdoor” memory access to processor models, bypassing the need for transactions moving through complex bus hierarchies.  Fast,  loosely timed modeling and more detailed approximately timed modeling styles are fully interoperable with TLM 2.0.  With loosely timed modeling, this allows faster, scalable simulation—processors and peripherals in multicore systems can be executed in parallel.  Also, with SystemC integration and support from RTL simulation tools, TLM 2.0-based virtual platforms can be established at the front-end for design and verification flows.

There are three major developments that will guarantee the adoption of TLM 2.0.  First, there is increased need for SystemC TLM standards to enable model exchange for  existing ESL design tasks, includingsystem level modeling and architecture design, algorithm design, and TLM reference models for functional verification,. Second, TLM modeling standards  are needed to support the rapid adoption of SystemC virtual platforms for developing software.  Last, but certainly not least, OSCI has more than 2,100 SystemC users worldwide, making their support of the TLM 2.0 standard quite significant. 

While the promise of the TLM 2.0 standard is appealing, there are still several hurdles to jump over.  A key challenge with TLM 2.0 adoption will be persuading its many prospects to disband their legacy tools and internally developed methods and models to realize the benefits of this new standard.  Companies who have developed their own internal formats will need to replace them with new technologies for TLM 2.0 support.   The standard also has room for future improvement, such as fully-interoperable third-party IP, and models for critical applications, like power consumption, software and architectural optimization.

I equate this new standard with Lewis and Clark, the frontiersmen and explorers who ventured West to find and claim new territories for America.  Similar to Lewis and Clark’s discoveries, TLM 2.0 is the new fertile ground that should reap a bounty for its community.  At this stage of TLM 2.0, it is much like the foundation, walls and infrastructure of a building waiting to be occupied.  While this structure serves its purpose, to serve as shelter for its residents—it still is in need of utilities, carpeting, furniture, and plumbing. 

My intent is not to cast doubt on the viability of TLM 2.0.  Quite the contrary— the TLM 2.0 standard as it stands today, serves as a great foundation.  With several companies rallying behind OSCI’s efforts, including my own, I believe we have the perfect “ground floor” opportunity to establish something vital and critical to our industry—particularly for ESL sector.  I am excited about the new frontiers that will be encountered on this journey of discovery.  TLM 2.0 and its long list of supporters should only enrich and enliven this “promised land” of opportunity.  We will all gain and benefit from our collaborative efforts to make TLM 2.0 the ubiquitous standard for today’s SoC designs—and this will inspire the electronics community to further innovate and explore new possibilities. 

–Glenn Perry, Mentor Graphics general manager, ESL and HDL Design division

glenn_perry@mentor.com