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	<title>Comments for NoC NoC</title>
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	<description>Deep Insights for Chip Architects and Engineers</description>
	<lastBuildDate>Thu, 02 Jun 2011 20:19:28 +0000</lastBuildDate>
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		<title>Comment on The Trouble With Tradeshows by Fred</title>
		<link>http://chipdesignmag.com/sld/shuler/2011/05/26/death-of-the-tradeshow/comment-page-1/#comment-102</link>
		<dc:creator>Fred</dc:creator>
		<pubDate>Thu, 02 Jun 2011 20:19:28 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/sld/shuler/?p=95#comment-102</guid>
		<description>Hi Kurt,

I think there are more avenues for engineers to look at new technologies today than just attending DAC

There are other conferences conferences/symposiums, such DesignCon, DVCon, ITC, TSMC, etc.

The major EDA vendors has user group conferences, WEB conferences, etc.

For smaller vendors, I&#039;ve see more WEB conferences.

There are also social media such as LinkedIn that offers user groups where folks can ask questions and information exchange.

I think for DAC attendance to go up, they should think about virtual DAC where folks can attend sessions using video streaming.  EDA companies can also use this medium to showcase their products.   An example of this is UBM Electronics Events:

 http://www.youtube.com/user/ESCSV2011

thanks

fred</description>
		<content:encoded><![CDATA[<p>Hi Kurt,</p>
<p>I think there are more avenues for engineers to look at new technologies today than just attending DAC</p>
<p>There are other conferences conferences/symposiums, such DesignCon, DVCon, ITC, TSMC, etc.</p>
<p>The major EDA vendors has user group conferences, WEB conferences, etc.</p>
<p>For smaller vendors, I&#8217;ve see more WEB conferences.</p>
<p>There are also social media such as LinkedIn that offers user groups where folks can ask questions and information exchange.</p>
<p>I think for DAC attendance to go up, they should think about virtual DAC where folks can attend sessions using video streaming.  EDA companies can also use this medium to showcase their products.   An example of this is UBM Electronics Events:</p>
<p> <a href="http://www.youtube.com/user/ESCSV2011" rel="nofollow">http://www.youtube.com/user/ESCSV2011</a></p>
<p>thanks</p>
<p>fred</p>
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		<title>Comment on Missing The Point by Srinivasan Venkataramanan</title>
		<link>http://chipdesignmag.com/sld/shuler/2011/01/27/missing-the-point/comment-page-1/#comment-61</link>
		<dc:creator>Srinivasan Venkataramanan</dc:creator>
		<pubDate>Thu, 03 Feb 2011 00:15:51 +0000</pubDate>
		<guid isPermaLink="false">http://chipdesignmag.com/sld/shuler/?p=19#comment-61</guid>
		<description>Very good article indeed. Very similar messaging from this part of the world (India) - on one hand Academia wants &quot;long term/pure research&quot;, industry wants &quot;hire-able candidates&quot; from that research work next year :-)

IMHO, especially for India region we need to define multiple tiers of these universities and leave  the pure research to the Tier-I (IITs, NIT), have the Tier-II to create modern SoC platforms and the next Tier to explore new languages etc.

Cheers
Srini
www.cvcblr.com/blog</description>
		<content:encoded><![CDATA[<p>Very good article indeed. Very similar messaging from this part of the world (India) &#8211; on one hand Academia wants &#8220;long term/pure research&#8221;, industry wants &#8220;hire-able candidates&#8221; from that research work next year <img src='http://chipdesignmag.com/sld/shuler/wp-includes/images/smilies/icon_smile.gif' alt=':-)' class='wp-smiley' /> </p>
<p>IMHO, especially for India region we need to define multiple tiers of these universities and leave  the pure research to the Tier-I (IITs, NIT), have the Tier-II to create modern SoC platforms and the next Tier to explore new languages etc.</p>
<p>Cheers<br />
Srini<br />
<a href="http://www.cvcblr.com/blog" rel="nofollow">http://www.cvcblr.com/blog</a></p>
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