The race is on to get new development tools out the door, and starting next month you’ll begin seeing many more of them.

Timing is everything, and these tools have to be ready for the next round of chip development—even if the chips aren’t being designed yet. But given that electronics design has to precede an industry recovery by 6 to 12 months, at the very least, and chips and other components have to be ready ahead of the market, there are rumblings in the ESL space that new products are on the way.

The biggest splash, of course, will be at the architectural and design engineering pain points. There will be advances in analog, prototyping and verification—as well as broader areas such as DFM and ESL. The goal of tools vendors is to get these new products into the hands of companies before summer. That way engineers can begin experimenting with them and understand their value. All of this is part of the normal—or abnormal, in this case—boom/bust cycle of semiconductor industry, and we’re about to leave the bust behind.

Don’t go spending your pennies yet, though. If electronic design is an early indicator of the economy, then ESL tools are an early, early indicator—sort of like the groundhog of Punxsatawny. Sales of those tools are a step further down the path of recovery, once they’re evaluated and compared against offerings from rival companies. Getting help to use them is even further down the path. Jobs are a trailing indicator, meaning that even after business picks up it will be months before hiring is back in vogue. And for all the people who are still working, but now doing the jobs of three people, the best you can hope for is that the new tools make your job simpler and less time consuming.

How much less time consuming remains to be seen. The blistering pace of Moore’s Law and the growing complexity of SoCs at every node makes the need for integrated tools even more important than in the past. What was a “nice-to-have” approach to tools is now a matter of survival, and complexity coupled with shorter market windows could well mean no net gains in productivity. Staying still in a strong current is now considered something of a breakthrough.

All of this should prove to be good news for some tools vendors. The question is which ones, and this will enter into the decisions of engineers about which tools are okay to buy. Best in class now has to be weighed against integrated best in class, which may or may not be the same. Engineers no longer have time to go fiddling with integrating tools into an internal flow. That all has to be done up front, whether it’s by one of the big EDA vendors or a startup with a breakthrough technology. Moreover, engineers can’t spend weeks gaining proficiency unless there is a reward of even more time saved than was spent gaining that proficiency.

Moore’s Law has always been an economic law, even if it requires physical engineering to work. The tools world has been only loosely tied to it, and frequently completely out of sync. In the future, these two will progress much more in tandem.

From a macro economic point of view, barring any more major disasters we will see a recovery begin sometime in the next couple quarters. The recovery will be enabled by new tools and fueled by new technologies. But the big question is not when but what—namely what the industry will look like when we really come out of the downturn. The success of these new tools may say much more about the new face of the industry than what we have seen in the past.

–Ed Sperling

Design engineers are pretty good about sharing ideas with their colleagues. They’re extremely good about sharing the limelight with their peers. But they’re not particularly good about implementing new ideas and concepts and changing the way they work.

There are good reasons for this, of course. It takes a long time to become proficient at skills for designing new chips or creating architectures, and no one has enough time these days to fool around with new ways of doing things. And up until 90nm, the buzz about things like design for manufacturing, transaction-level modeling, and even automated analog design were relegated to the marketing departments.

At 65nm, DFM became a necessity. At 45nm, so will ESL. And at 32nm and beyond, all of this will be combined with vertical stacking, new substrates and other materials, new gate structures, and more integration of software and hardware, multiple power islands and complex timing. In this scenario, the most highly valued attribute for engineers will be understanding as many pieces of the chip design as possible, rather than just being an expert in one area, and at least understanding how to integrate everything from third-party IP to developing software prototypes and interconnects.

This is complex stuff, and no one has the ability to learn everything. But everyone who wants to have a place in overseeing design will at least have to understand the concepts and speak the language of integration. We are at a point where complexity is forcing economic changes—it takes more money to develop chips, it takes more volume to make them successful, and it takes more money to engineer products out the door in shrinking market windows. Those economic changes already are starting to boomerang back to the design world, and ultimately they will have a profound impact on individual engineers.

In the midst of all of this, learning new things may seem like the last thing an engineer should be doing. It may not even pay off for a couple years. But by the time the industry hits 45nm as a volume platform, and 32nm on the most advanced nodes, rewards will go to those who understand new concepts, new approaches and how to integrate everything together.

The clock is ticking.

–Ed Sperling

Complexity isn’t always bad. The key is being able to deal with it intelligently and economically.

Systems engineers are in the middle of one of the most complex periods in chip development. In the past, they typically had to deal with one problem at a time. At 1 micron, the wall was lithography. At 90 nanometers, it was low-k dielectric insulation (and yes, copper interconnects and 300mm wafers). At 65nm it was new gate structures, high k insulators and and strained silicon.

But at 45nm, 32nm and 22nm, not to mention all the half nodes in between, it’s not just a single thing. It’s all of the above, plus potentially new substrates, power islands, power gating and stepping, more lithography, more IP and potentially even more problems such as high defect density. And they’re stacking up in an ever-larger pile at each process node.

This is going to force the hand of companies that have been relying on home-grown tools because they’re cheaper, and it’s going to test the faith of systems engineers who have to design and verify these incredibly complex devices. They can’t possibly understand every facet of development anymore, so now they have to work within safe zones—boxes they create in which they know pieces work properly.

For engineers who have been developing chips for more than a decade, this is an unnerving development. It’s a matter of plugging data into a black box and waiting for the answer to come out the other side. On one hand, it’s hard to meet tape-out schedules without using this kind of technology. On the other, it’s hard not to feel like your skills are being marginalized along the way. Even analog engineers, who considered themselves to be the last holdouts, are heading down this path.

IBM began working with this approach publicly in the early part of this decade when it began offering commercial foundry services and promising first-pass silicon. Since then, most companies have been experimenting with it in one form or another, whether it’s TLM 2.0, IP-XACT or the new low-power IEEE 1801 standard.

Complexity is forcing more compliance and that isn’t necessarily all bad—as long as engineers can figure out a way to stay current and add new value.  But the days where an engineer could learn a skill and continue applying it over several decades are over. At 90nm, we passed from expertise as a fixed asset to a expertise as a relative asset—and one that needs constant refreshment. At 32nm, engineers will need a smattering of knowledge in physics, and at 22nm they will need to understand subatomic physics, chemistry and, increasingly, business.

For those who can adapt and create value for their companies, complexity will serve them well. For those who can’t—well, it’s better to think you can. 

–Ed Sperling

The strong get stronger in a downturn for reasons that aren’t readily apparent at the outset of the slump.

First of all, contracts that are in place at the outset typically don’t get canceled—at least not at first, and frequently not at all. In the system-level design world, those contracts can last as long as 18 to 24 months. Even if the number of derivative chips is scaled back, or killed altogether, there’s a cost involved in that. More commonly, companies opt to skip a process node and live with what they have longer.

Second, many of the startup companies competing with large established players in the system-level design market are funded by private investors. Those investments are made in A, B and C rounds (there are multiple other names that mean the same thing), and the funding is often doled out over periods of two years or more.

Finally, it takes time for a slowdown to really sink in. No one knows how long a downturn will last when it begins, and they don’t know how long an upturn will last. The dot-com bubble exploded violently in 2001 largely because it went on entirely too long at an unrealistic growth pace. The current downturn is following roughly the same course, filled with uncertainty because of the effects of globalization. There was less inventory, but the supply chain is much more dispersed.

Corrections eventually lead to overreactions on the part of customers, which is where the real damage to small companies gets done. The customers of the customers who develop systems now are asking for more integrated solutions rather than just chips. They want it complete with software, integrated and fully tested IP, and it has to work within a power budget that extends well beyond the chip itself.

It’s becoming too complicated—as in time-consuming and expensive—to integrate IP blocks from different vendors. It’s also too expensive to integrate point tools, which individually may be best of breed. And it may be getting to expensive to integrate homegrown tools, despite the fact that the development on those tools is already depreciated.

All of these changes take time to unfold. Market shifts are measured in years rather than months. You don’t starting looking to save pennies at first. You start with those places where you can save dollars and the lowest-hanging, most visible opportunities. IDMs outsourcing their production to foundries was an easy choice. Skipping process nodes was another. But now the focus is shifting to tools.

The first signal that something was amiss was when exit strategies for startups migrated from IPOs to acquisitions by large companies. That dramatically weakened their leverage to cash out at a premium. The next step was a sharp reduction in VC capital flowing into the ESL tools market, because with no easy exit the return on investment was far riskier. Following that came a cut in the amount of money available to EDA and ESL startups, because there was no reason to fund massive infrastructure if the companies weren’t going public.

Finally, with investments now considered riskier, venture money is shifting to lower-cost geographies such as China where the amount of startup capital needed is even lower. While labor costs are rising, it still costs less to hire engineers in China than in the United States, and a half-dozen engineers in China led by a U.S.-trained manager is much less of a financial risk than trying to build a company in Silicon Valley. It’s also much cheaper for a large company to buy an offshore startup or their IP and integrate it into their tools suite.

Add all of this together and the strong become even stronger. Downturns work in their favor because it costs even less money to add new tools or expertise. It remains to be seen whether an uptick in the market, probably beginning in the second half of this year, reverses this trend. But just as it took time to get to this point, it will take months if not years to figure out if it’s reversible.

–Ed Sperling