VMM vs. OVM Becomes More Important
For all the talk about VMM vs. OVM and how it doesn’t matter…well, apparently it does.
It’s not that one verification environment is so much better than the other. That’s like saying one religion is better than another. People kill each other over those kinds of statements. And the truth is, there are plenty of people who will argue for and against each side.
Strangely, when you really dig into this, you’ll more than likely never get a straight answer because most people don’t know both methodologies. They learn one and that’s complicated enough for most mere mortals.
But complexity is getting to the point even at the most mainstream process nodes where verification headaches are becoming overwhelming. More transistors, multiple cores, multiple power islands and various on, off, and sleep states makes the need for better verification methodologies, languages, and base classes almost essential for debugging these designs. And it doesn’t help when there are different people in an organization with expertise in different methodologies.
There has been talk about bridging the two environments, matching data types or wrapping code. But so far, there has been little progress in this arena and the time needed to verify increasingly complex designs grows accordingly. Where are those corner bugs hiding? You’d prefer not to find out after a product is already out in the market.
It’s time this issue came out in the open instead of being stuck in standards groups. In the past, who used what verification methodology didn’t really matter. But it matters now, and the verification problem is only going to get worse.
What do you think?
–Ed Sperling
Tags: ovm, verification, vmm
May 8th, 2009 at 1:14 pm
With a little snooping of different job postings & LinkedIn profiles it should be identifiable which co. uses which methodology. It would be interesting to compile such a public/open list. On a related note, Harry the ASIC guy did a poll on the topic of verification methodologies too.
May 8th, 2009 at 1:17 pm
Ed, I agree with you completely! It is a religous battle and that is why companies like Breker are taking a unique stand – Breker is working with all verification flows to simplify the process of generating complex scenarios to find errors. After all, it is all about bug discovery!
May 8th, 2009 at 2:00 pm
Hi Ed,
The verification community is not ready yet for a methodology war. The pain level that the average verification team feels has not driven them to seek a methodology. Also, IP vendors have not been driven to produce verification IP for their IP cores.
As for managing complexity, we should learn what the software industry learned years ago. Things like interface versus implementation, data abstraction, data duplication is evil, and minimizing “if” tests, just to name a few.
In my opinion, the VMM and OVM and not good examples of these “lessons learned”.
Now as full disclosure, I have co-written a tiny open source verification framework that runs on 5 simulators and is in C++ and SystemVerilog. Also, I have co-written two books on verification that attempt to bridge the software versus verification engineer gap.
Mike
May 8th, 2009 at 2:11 pm
Ed,
You say there has been little progress in bridging the VMM and OVM… That’s certainly not the case. The Accellera VIP TSC, of which I am a member, has made great progress in this area. Even outside of the standardization effort, Mentor and Cadence released VMM/OVM interoperability libraries back in December.
As a side note, back in the fall, I gave a worldwide seminar series on the similarities and differences between certain aspects of the VMM and OVM… The information is out there, you just need to know who to ask.
JL
May 8th, 2009 at 2:41 pm
JL, you are one of a very small number of people who are well versed in both methodologies, but the number of engineers on each side is quite large. If progress has been made, it’s certainly not so evident from the sidelines.
May 8th, 2009 at 4:21 pm
Ed,
Perhaps the Accellera Verification IP Technical Subcommittee’s work is more of a secret to you and possibly others. Progress is being made. So I would not despair.
And, as I recall from the last Accellera VIP TSC meeting, there is a pending agenda item to discuss an informational TSC meeting at the up coming DAC to discuss the details of the work. We will have Accellera alert you to this so you and your readers can attend.
As good progress is being made in “bridging the two environments” as you put it, this will address fundamental issues to adopt evolving technology. Namely, Newton’s First Law that a body at rest tends to stay at rest is addressed to allow efficient interaction between the “two environments” to promote reuse in the verification community of current and past work as the standards teams are on their Newtonian convergence path to offer a more unifying solution.
Lastly, I think you pin too much hope for a methodology to cure all verification issues alone. IMHO it will not do this. What it will do is set the stage for further fundamental work/research that needs to be applied on top of these methodologies to address those difficult verification challenges.
At Mentor we can already see the algorithmic inventions accrue to our verification solution within the context of OVM while simplifying adoption by preserving historical investments.
-Dennis
May 11th, 2009 at 12:23 am
This conversation seems to be proving Ed’s point. We have a user, two vendors, a consultant and a standards body saying different things. Let’s hope that Dennis’ seminar at DAC actually shows some sort of direction.
May 11th, 2009 at 1:38 am
[...] Sperling’s post at the System-Level Design Community revives a methodology topic that I think many verification [...]
May 11th, 2009 at 2:02 am
Ed,
I’ll echo some of Dennis’ comments — the Accellera VIP TSC is making steady progress towards methodology interoperability and ultimately what verification teams tell me they want – a single industry standard.
In the meantime, verification teams still need to get chips out and methodology can play a big role in improving their productivity. So as Synopsys supports the Accellera effort, it also continues to invest R&D bandwidth in VMM with new methodology applications, extensions to low power, updated libraries, etc.
-tom
May 11th, 2009 at 11:15 am
Though late to the thread, I will have to echo the comments from JL and Dennis, but add one more important point. At this point, the user base for OVM is huge (more than 7000 registered on OVM World and approaching 500 on LinkedIn). I would assume that VMM has a loyal following as well. Any new library is likely to cause each base a costly migration, but as Dennis and JL pointed out, we are on the verge of having a great interoperability solution jointly developed by all three large simulation vendors. It would seem to me in this tough economic era, that we may actually have the most pragmatic solution in-hand.
=Adam Sherilog
Cadence