Looking around the system-level design industry from the vantage point of DAC is like looking down on a bustling city from an airplane. It’s impossible to see all the different processes and technologies that go into creating a design from too high up, just as it’s almost impossible to see the entire system-level design from a single gate or memory subsystem or block.

That’s the whole purpose behind modeling, which increasingly is where the industry is headed at advanced process nodes. Models ranging from TLM 2.0 to networks on chip and methodologies like VMM and OVM allow us to get the job done by managing lots of little pieces. The problem is that you have to think at the upper level, when most of the work has to be done at the nano level.

This is pretty much a slam dunk for recent engineering school graduates. They work with the tools that were given to them by their professors. But they lack the granular knowledge to fix something when it goes wrong or to be able to think of unique ways out of a problem when it’s not included in the model.

On the other hand, the engineers who have been doing designs for a decade or more understand lots of little pieces but they’re reluctant to use the new models. Modeling implies surrendering some control to the greater whole, which is not something that comes naturally to most people. Worse, engineers who have kept that kind of hands-on approach in the past generally have come up with better designs.

But times are changing, and we are at a crossroads in design. Engineers need to think differently at 32nm than they did at 130nm. Chipmakers need to invest in the necessary skills and training if they to produce great designs, rather than just hiring young graduates for less money, and tools vendors need to educate the chipmakers as an industry rather than just preaching their message to devotees of design at DAC.

–Ed Sperling

Designing chips has always attracted the best and the brightest minds. The sheer complexity of creating submicron technology creates challenges in mathematics, physics and science, and if intellectual stimulation ever wanes there’s always the problems associated with the next process node.

Moore’s Law sees to it that new and interesting challenges always have to be met. But it does nothing to see that there is a constant demand for new products. In the past, downturns have bypassed the design world. While chipmakers and capital equipment makers are used to painful up and down cycles, EDA has steadfastly remained in positive turf for decades. This is the first time in its history that it has ventured into negative territory.

So what’s driving this change? For one thing, the end market for semiconductors. Much of the recent growth has come from the consumer market, and while all of that provided enormous opportunity—think 1 billion cell phones replaced every couple years vs. a couple hundred million computers replaced every four to five years—it’s also based upon consumer confidence. In a downturn, consumer confidence slumps. In contrast, most corporations continue to buy technology on a standard replacement cycle, as witnessed by Intel’s recovery.

Growth in areas like medical and industrial electronics may compensate for this eventually, but not immediately and not at the same kind of volume growth as the consumer electronics market. These chips may not even be at the most advanced process nodes, and much of the work may be analog rather than digital. While the EDA industry has been pitching analog solutions for years, they haven’t caught fire the way they have in the digital world. In fact, they may not be widely accepted until recent graduates of analog engineering programs move up into more senior roles at companies.

That leaves vendors of design automation tools and strategies in limbo. While the market will likely pick up—almost everything that is now mechanical will ultimately have an electronic component because it’s much, much cheaper—it may not happen in the same vertical sectors. And no matter how well or when the Americas and Europe recover, the really sharp spikes in growth over the next decade will come from places like India and China where there are still more than 1 billion people untouched by the current economic explosion. In those geographies, the bulk of sales are likely to be extremely cost-sensitive and less cutting-edge technology, which means reference designs may suffice rather than the need to buy the latest and greatest design technology.

Disruptive changes are…well…disruptive. Not all companies survive. Some get bought, others go out of business. Still others manage to transform into something completely different, figuring out where the opportunity is and what they have to offer in the reshaped economy. And people whose jobs hang in the balance sometimes need to change their skill sets to match the changes in the overall market.

This is the overriding theme behind this year’s DAC. Technology is still important, but economics has always been the real driving force. And this year, it is a much weaker force than in the past.

–Ed Sperling

This year’s DAC should be one of the more interesting shows in several years, although not for the usual reasons.

As an industry, we are just emerging from one of the worst downturns in decades. It started in December 2007, and various segments of the overall economy will begin picking up at different times, depending upon whether they’re leading indicators or trailing indicators. Netbooks and cell phones are selling well. Automotive electronics continues to suffer badly. And computers are recovering, although at much lower price points than in the past.

In the case of system-level design tools, there should be a very strong demand for the best in class and those with the best integration story. New chips are far more complicated to build than in the past, which means engineers need better tools for modeling, interfaces and DFM to ensure the chips can actually be manufactured.

Missing a market window at 45nm is expensive. At 32nm it can force a company to sell off some of its assets. And at 22nm, it actually can kill a company.

Feeding into this demand for tools is the fact that most chipmakers are short on staff. Companies cut engineering jobs during the downturn, and most will try to get through the short term hiring as little full-time help as possible. That means more focus on high-level abstractions and modeling, and more contract labor at the end of the design cycle when last-minute changes are necessary to hit a market window. The big question there is whether that contract labor will be up to speed on the newest tools and methods to be able to work as effectively as in the past.

This is a pivotal time in chip design, and system-level design tools are an integral part of this transition. But so are shifts in the job market for engineers, new skill requirements and globalization. That means lots of griping, lots of uncertainty and lots of questions—and right now it doesn’t appear there will be enough answers to satisfy most people.

So if you’re attending DAC, check out what’s happening on the show floor and in the conference rooms. But make sure to listen to what’s being talked about in the hallways. That may be where the really interesting stuff happens.

–Ed Sperling

We’ll probably never know the full extent of the story, but it appears the board of directors at TSMC didn’t just rubber stamp Morris Chang’s title when it named him chairman and CEO last month.

Chang was always chairman, but he wasn’t CEO. He had bestowed that title on Rick Tsai several years ago, who was Chang’s heir apparent. Tsai was named president of the new business development organization last month, reporting to Chang.

While Chang is almost synonymous with the creation of the foundry business, market founders don’t always end up as the long-term leaders. Steve Jobs at Apple is a rarity, and even he got pushed out of the company once. Most of the other companies that created a new business sector didn’t finish first, and most of the other leaders who started companies in the tech business—at least in the last several decades—didn’t survive.

The foundry business is a particularly tough one. Foundries talk about service, depth of offerings, established processes at advanced nodes and half-node jumps. But the bottom line is it’s still differentiated on price, which is measured in cost per chip, yield (a measure of the stability of processes), time to market for top customers and the ability to avoid respins. And for the most part, that business takes place at older process nodes where the factors are the only differentiators.

That’s at least part of what’s driving the restrictive design rules at the front end of Moore’s Law. Getting chips out the door, on time and in decent enough yields, is a marketing tool, if nothing else, and if restrictive design rules are necessary to accomplish that then foundries will insist on them. The other driver is lithography, which makes designs even harder to tape out successfully because the laser beams used to etch the silicon right now are much wider than the line widths between the wires.

So what really happened at TSMC? Consider the following series of events. First of all, TSMC is having yield problems at 40nm while its competitors are churning out chips at 45nm. Second, the Common Platform folks have 40nm technology ready and waiting when it becomes competitively necessary to offer it—namely when TSMC begins offering it. And third, TSMC is now feeling the pinch of the Common Platform’s growing ecosystem and SMIC’s rollout of 45nm process technology.

Add those three factors up and it’s no wonder that TSMC is changing its top management. The return of Morris Chang to CEO apparently wasn’t just an honorary title. It was a necessary change.

–Ed Sperling