For the past decade we have been hearing grim tales about the number of design starts shrinking and how that’s hurting EDA. While that makes for sensational headlines, reality is somewhat fuzzier and far less grim.

The big shift that’s underway isn’t so much a decline in design starts as a rise in SoCs. But SoCs are never really created from scratch. They’re a combination of commercial IP, re-used blocks from previous designs, and some new stuff thrown in. It’s hard to call that a design start. It’s not even certain that’s a derivative. And as we move into stacked die configurations over the next couple years, there will be even less that can be clearly defined.

This is hardly bad news for tools vendors. The increasing complexity of SoCs, versus ASICs or ASSPs, requires more tools and more sophistication on the part of the engineers using those tools. Emulation sales are on the rise. So is the number of classic EDA tools being sold, along with some non-classic ones. And with acquisitions by all of the big EDA players into adjacent markets, it’s not even clear what EDA really is anymore, or whether it should be called EDA.

These kinds of definitions were great for keeping investor interest in EDA in its stock-price boom years, but they will need to be revamped to keep pace with the changes in design. Semiconductor content continues to grow in everything from medical devices to automobiles and consumer electronics. It’s also more complicated than before, requiring more tools to develop, integrate and verify.

But how we define the process of creating semiconductors and how we break it down also can have a big impact on how much money is available for future development. This is an important job, and it’s one that needs to be done collaboratively by the business side of tools companies. It’s also one that needs to be done soon if the industry expects to realize its full potential.

–Ed Sperling

It’s not uncommon to hear engineers express disbelief these days that a complex device actually works. This is both a sign of amazing advancement in system-level design, as well as a scary revelation that’s surfacing from all parts of the design world.

What’s behind this uncertainty is the growing complexity of devices, which has moved design well beyond the comprehension of a single engineer—no matter how good they are or how many pieces they understand—and increasingly even beyond the capabilities of a team of engineers. There are simply too many parts, too many interactions, and too many lines of code to understand it all.

It doesn’t help, either, that IP, subsystems and abstractions are black boxes. No matter how much we try to get comfortable with black-box technology, it still creates an element of doubt that the final product will work as planned. The engineering community is very comfortable with things they understand. They’re far less comfortable taking someone else’s word that it works.

Perhaps even more daunting is the verification piece. With roughly 50% to 70% of the design NRE still in verification—both software and hardware—there is a lot of pressure to reduce costs and cut time to market. Verification is the single biggest target for achieving both. But there also is more to verify, which forces verification teams to rely more on pre-verified IP and software written by other teams who often don’t speak the same language, both from a technology standpoint and literally.

How it all works together is at best an educated guess, and as devices continue to grow in complexity so do the question marks. This isn’t going to get any easier, either, particularly as blocks of IP and software give way to complete subsystems and chips. While this all works better in theory, it also moves the pieces further from the individual engineering teams and re-introduces a virtual silo behavior.

The one link across all of this will be verification. But it remains to be seen just how complete that verification will be, what skills will be necessary for verification teams, and whether the complex products created by an ecosystem really can work flawlessly—particularly in light of some recent failures by some of the most successful IDMs.

–Ed Sperling