• Press Release: Over 35% Revenue Growth in First Half of 2012
• Thoughts on RTL Lint, and a Poem
• Real Intent is #8 on Gary Smith’s “What to see at DAC” List!
• Gabe on EDA: Real Intent Helps Designers Verify Intent
• EDACafe: A Page is Turned

Chip Design Trends Research Services

Chip Design Trends BiAnnual Report "The Slowing of Moore's Law and its implications on the Chip Design market" - Now Available!

Key Findings Include:

• Pre-Silicon design investigations grew by 18% compared to a year ago
• New design activity surged in Europe, followed by increases in the Asia-Pacific region and relative flat growth in North America
• Use of semiconductor IP continued to increase, with analog-mixed signal and digital-core IP showing the largest segment growth - up by 35%!
• Hot markets include communications, data processing and industrial-medical.
• Overwhelming evidence supports the slowing of Moore's Law:
  • Tracked complexity metrics (like die size, clock speed, process node etc.) are less than would be expected under Moore's Law
  • Semiconductor industry is functioning at eight active process nodes versus the historical four nodes.
  • The "Design Gap" of the '90's is now the "Manufacturing Gap" of the 00's - i.e., the productivity boost from EDA tools is less than would be expected.
  • Extremely high cost of capitalization of bleeding-edge fabs.

Basis of Report:

• Over 44,000 unique worldwide and regional pre-silicon design investigations
• Analysis and forecasting of key chip design metrics including power, die size, clock speed, analog vs. digital IP, metal layers, technology nodes, memory vs. age and much more

Available Now

Discount Price Available until April 30th: $1,950 (One Issue); $2,950 (Two Issues). Multiple copy discounts and site licenses available upon request.

Forecast the Future with Chip Design Trends Custom Research Reports

CDT Advantage:

• A growing aggregated database of over 44,000 unique pre-silicon, chip architectural design investigations - precursors to chip starts - containing important complex SoC metrics such as power, die area, clock speed, IP, processor-memory-interface cores, technology nodes, metal layer, regional user-market breakdowns and more.
• Access to the Chip Design property (print/online/e-Newsletters) readership, which represents leading Integrated device manufacturers (IDMs) - traditional chip design and manufacture vendor, fabless IP companies, EDA tool suppliers, semiconductor equipment vendors and foundries.
• As appropriate, access to the Chip Design affiliate sponsor subscribers, including leading chip, EDA and semiconductor organizations
• Chip Design's cadre of leading technology and business editors/analyst

For more information email Melissa Sterling or contact her at +1 415-970-1910.

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• Best Practice Development Processes for Medical Device FPGAs

• Direct Power MOSFET Capacitance Measurement at 3000 V

• Common Pitfalls in PCI Express Design

• Increasing Revenue Through Continuously Optimized Data Center Management

More White Papers >>

• Power Model Complexity Grows
• Material Effects: Trading Performance For Power
• Low Power Dominates CES
• Editor's Note: Technology Crossover Ahead
• Absolute Power: 4G LTE vs. 3G

Sponsored by:

• The Next SoCs
• Derivative Designs Demand Discipline
• Software Takes Control
• Editor's Note: The Next Frontiers
• ESL Edge: Getting Ahead Of Yourself

Sponsored by:

• The 28nm Foundry Crunch
• The Brave New World Of Modeling TSVs
• Getting Ready For 20nm
• Editor's View: Training Technicians, Hudson Valley Style
• Semico Spin: Forecasting Wafer Demand: Technology Migration, Bottlenecks and Confetti

Sponsored by:

• Chip Design Resource Catalog
• Chip Design Buyers' Guide
• Interoperability Guides
  • Cadence and Third-Party Solutions Guide
  • Mentor Graphics Vanguard Partner Interoperability Guide
  • OCP IP Member Guide
  • Synopsys - Focus on Interoperability
• IP Solutions Resource Catalog
• Valuable Resources
  • AdvancedTCA
  • DSP
  • FPGA and CPLD Resource Catalog
  • MIPS ® Embedded Resource Catalog
  • Multicore
  • PCI Express

Click here for more >>