// SPDX-License-Identifier: MIT
`timescale 1ns/1ps
module tb;
  logic clk=0,d=0,q=0;
  always #5 clk=~clk;
  always @(posedge clk) q<=d;
  initial begin
    @(negedge clk); d=1; @(posedge clk); #1; $display("OBS d=%b q=%b",d,q);
    $finish;
  end
endmodule